Question 1

Counting practice: count from zero to thirty-one in binary, octal, and hexadecimal:



 

Question 2

Predict how the operation of this logic gate circuit will be affected as a result of the following faults. Consider each fault independently (i.e. one at a time, no multiple faults):



Output of OR gate U2 fails low:
Output of inverter gate U3 fails low:
Output of AND gate U1 fails high:

For each of these conditions, explain why the resulting effects will occur.

 

Question 3

Predict how the operation of this logic gate circuit will be affected as a result of the following faults. Consider each fault independently (i.e. one at a time, no multiple faults):



Output of AND gate U2 fails low:
Output of AND gate U2 fails high:
Output of inverter gate U1 fails low:

For each of these conditions, explain why the resulting effects will occur.

 

Question 4

Predict how the operation of this logic gate circuit will be affected as a result of the following faults. Consider each fault independently (i.e. one at a time, no multiple faults):



Output of NAND gate U2 fails low:
Output of buffer gate U3 fails low:
Output of NOR gate U1 fails high:

For each of these conditions, explain why the resulting effects will occur.

 

Question 5

This circuit is supposed to energize a lamp when the input voltage (Vin) falls between the two reference voltages set by Rpot1 and Rpot2. Predict how the operation of this circuit will be affected as a result of the following faults. Consider each fault independently (i.e. one at a time, no multiple faults):



Comparator U1 output fails low:
Comparator U1 output fails high:
Comparator U2 output fails low:
Comparator U2 output fails high:
Wire connecting VDD to Rpot1 fails open:

For each of these conditions, explain why the resulting effects will occur.

 

Question 6

This circuit is supposed to energize the green lamp when the input voltage (Vin) falls between the two reference voltages set by Rpot1 and Rpot2, and energize the red lamp when the input voltage exceeds both reference voltages. However, something is wrong with this circuit: the green lamp operates just as it should, but the red lamp never turns on even when it is supposed to.



A technician decides to replace the red lamp, thinking it is burned out. This, unfortunately, does not fix the problem. Identify two possible component faults that could account for this problem, and describe what further diagnostic steps you would take to determine the precise nature of the fault.

 

Question 7

A technician decides to check a suspect three-input AND gate using a logic pulser. She touches the logic pulser to each input of the AND gate, while looking for a pulsing signal at the output with a logic probe.



No matter which input test point (TP1, TP2, or TP3) she pulses, though, the output test point (TP4) always reads low. Does this prove the AND gate to be defective? Explain why or why not.

 

Question 8

Identify each of these logic gates by name, and complete their respective truth tables:



 

Question 9

Identify at least two faults in this simple logic gate circuit that could cause its output to fail in the “low” logic state:



Be sure to explain why the proposed faults would cause the output to fail low.

 

Question 10

Explain why placing static-sensitive components (such as CMOS integrated circuits) into a block of conductive foam protects them against damage from ESD, and why this protection exists even if the entire block of foam (with chip) is brought to an elevated potential with respect to earth ground.

 

Question 11

For a true TTL gate (not high-speed CMOS), what is the default logic state of an input line that is left floating (neither connected to VCC nor Ground)? Explain why this is.

 

Question 12

What logic state does a floating CMOS gate input naturally assume? How does this compare against traditional TTL?

 

Question 13

As an electronics instructor, I have the opportunity to see a lot of creative mistakes made by students as they learn to build circuits. One very common mistake made in CMOS circuit construction manifests itself in erratic behavior: the circuit may function correctly for a time, but suddenly and randomly it stops. Then, just by waving your hand next to the circuit, it begins to work again!

This problem is especially prevalent on days where the atmospheric humidity is low, and static electric charges easily accumulate on objects and people. Explain what sort of CMOS wiring mistake would cause a powered logic gate to behave erratically due to nearby static electric fields, and what the proper solution is to this problem.

 

Question 14

Explain why the allowable power supply voltage range for a true TTL (not high-speed CMOS) logic gate is so narrow. What is the typical range of supply voltages for a true TTL gate, and why can’t this type of logic gate operate from a wider range of voltages as CMOS gates can?

 

Question 15

Logic probes are useful tools for troubleshooting digital logic gate circuits, but they certainly have limitations. For instance, in this simple circuit, a logic probe will give correct “high” and “low” readings at test point 1 (TP1), but it will always read “low” (even when the LED is on) at test point 2 (TP2):



Now, obviously the output of the gate is “high” when the LED is on, otherwise it would not receive enough voltage to illuminate. Why then does a logic probe fail to indicate a high logic state at TP2?

 

Question 16

A useful test instrument for digital gate circuit troubleshooting is a logic pulser. Explain what one is and give an example of how it is used.

 

Question 17

A technician is using a logic pulser to force the logic state of the wire connecting two of the gates together:



Which gate, or gates, are we testing by placing the pulser in this position? What other instrument(s) would we have to connect to the circuit (and where?) to complete the test? Why does the logic pulser require a ground connection to do its job in this circuit?

 

Question 18

In this circuit, a comparator is set up to detect whether the outside or inside temperature is greater, and turns on a cooling fan when conditions are right. Predict how the operation of this circuit will be affected as a result of the following faults. Consider each fault independently (i.e. one at a time, no multiple faults):



Comparator U1 output fails low:
NAND gate U2 output fails low:
NAND gate U2 output fails high:
Transistor Q1 fails shorted (drain to source):
Resistor R2 fails open:
Thermistor R3 fails open:
Resistor R4 fails open:
Solder bridge (short) across thermistor R1:

 

Question 19

The output of the following gate circuit is always low, no matter what states the input switches are in. Assume that CMOS logic gates are being used here:



Identify which of these possibilities could account for the output always being low:

Output of U1 stuck in a high state
Output of U1 stuck in a low state
R1 failed open
Switch C failed open
Switch B failed open
Switch A failed shorted

 

Question 20

The output of the following gate circuit is always high, no matter what states the input switches are in. Assume that CMOS logic gates are being used here:



Identify which of these possibilities could account for the output always being high:

Output of U1 stuck in a high state
Output of U2 stuck in a high state
R1 failed open
R2 failed shorted
R3 failed shorted
Switch A failed open
Switch B failed shorted
Switch C failed shorted

 

Question 21

The following gate circuit has a problem:



When tested, it is found that the circuit does not respond in the same manner as its (ideal) truth table predicts. Here is a comparison of the ideal and actual truth tables, as predicted and tested:


A B C Output (ideal) Output (actual)

0 0 0 1 1

0 0 1 0 0

0 1 0 1 1

0 1 1 1 0

1 0 0 1 1

1 0 1 1 1

1 1 0 1 1

1 1 1 1 1


The first thing a good electronics technician would do, of course, is set up either a voltmeter or a logic probe and begin testing for logic levels in the circuit to see what is wrong. However, the settings of the input switches are very important as part of the diagnosis. Based on the design of the circuit, and the truth table results shown, in what states (open or closed) would you first set the input switches, and then what logic level would you first test with the logic probe or voltmeter?

 

Question 22

The purpose of this circuit is to provide indication of when the rotary encoder shaft is in a particular position (matching the setting of the 8-position switch array):



Trace the directions of all currents in this circuit, using electron flow notation, when the encoder position matches the pre-set code entered at the switches. Then, identify specific component failures that could result in the solenoid coil not energizing in this condition.

 


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