Question 1

Identify each of these logic gates by name, and complete their respective truth tables:



 

Question 2

Identify each of these relay logic functions by name (AND, OR, NOR, etc.) and complete their respective truth tables:



 

Question 3

Inspect each of these Boolean expressions, and determine whether each one is a sum of products, or a product of sums:


(B +

C
+ D)(

A
+ B)


A

B

C
+

A
BC


(X +

Y
+

Z
)(

Y
+ Z)(

X
+ Y)



M

N

O
+ MN

O
+ M

N
O


(X +

Y + Z
)(

Y +

Z

)



ABC
+ A

B
C

 

Question 4

Sum-of-Product Boolean expressions all follow the same general form. As such, their equivalent logic gate circuits likewise follow a common form. Translate each of these SOP expressions into its equivalent logic gate circuit:


AB + A

B


A

B
+

A
B


ABC +

A
B

C
+ AB

C

 

Question 5

Although it is seldom done, it is possible to express a truth table in verbal form, by describing what conditions must be met in order to generate a “high” output.

Take for example this simple truth table, for an inverter circuit:



For this truth table, we could say that the output goes high when A is low. A different way of saying this would be to state that “the output is true when [A] is true.”

Let’s look at another example, this time of an AND gate:



For this truth table, we could say that the output goes high when A and B are both high. A different way of saying this would be to state that “the output is true when A is true and B is true.” To use a half-Boolean, half-verbal description:


A AND B

Examine this logic gate circuit and corresponding truth table:



Express the functionality of this truth table in words. What Boolean conditions must be satisfied (“true”) in order for the output to assume a high state?

 

Question 6

Develop a verbal description of this truth table, specifying what conditions must be met (”true” in a Boolean sense) in order for the output to assume a high state:


A B C Output

0 0 0 0

0 0 1 0

0 1 0 0

0 1 1 0

1 0 0 0

1 0 1 1

1 1 0 0

1 1 1 0


Do the same for this truth table as well:


A B C Output

0 0 0 0

0 0 1 1

0 1 0 1

0 1 1 0

1 0 0 0

1 0 1 0

1 1 0 0

1 1 1 0

 

Question 7

Suppose you were faced with the task of writing a Boolean expression for a logic circuit, the internals of which are unknown to you. The circuit has four inputs - each one set by the position of its own micro-switch - and one output. By experimenting with all the possible input switch combinations, and using a logic probe to “read” the output state (at test point TP1), you were able to write the following truth table describing the circuit’s behavior:



Based on this truth table “description” of the circuit, write an appropriate Boolean expression for this circuit.

 

Question 8

Write a Boolean SOP expression for this truth table, then simplify that expression as much as possible, and draw a logic gate circuit equivalent to that simplified expression:


A B C Output

0 0 0 0

0 0 1 0

0 1 0 1

0 1 1 0

1 0 0 0

1 0 1 0

1 1 0 1

1 1 1 0

 

Question 9

Write an SOP expression for this truth table, and then draw a gate circuit diagram corresponding to that SOP expression:


A B C Output

0 0 0 0

0 0 1 0

0 1 0 1

0 1 1 1

1 0 0 0

1 0 1 0

1 1 0 0

1 1 1 1


Finally, simplify this expression using Boolean algebra, and draw a simplified gate circuit based on this new (reduced) Boolean expression.

 

Question 10

Write an SOP expression for this truth table, and then draw a ladder logic (relay) circuit diagram corresponding to that SOP expression:



Implement the SOP logic function using contacts of relays CR1, CR2, and CR3. A partial ladder logic diagram has been provided for you.

Finally, simplify this expression using Boolean algebra, and draw a simplified ladder logic diagram based on this new (reduced) Boolean expression. When deciding “how far” to reduce the Boolean expression, choose a form that results in the minimum number of relay contacts in the simplified ladder logic diagram.

 

Question 11

Design the simplest relay circuit possible (i.e. having the fewest contacts) to implement the following truth table:


A B C Output

0 0 0 0

0 0 1 0

0 1 0 1

0 1 1 0

1 0 0 0

1 0 1 0

1 1 0 1

1 1 1 1

 

Question 12

Product-of-Sum Boolean expressions all follow the same general form. As such, their equivalent logic gate circuits likewise follow a common form. Translate each of these POS expressions into its equivalent logic gate circuit:


(A + B)(

A
+

B
)


(

A
+

B
)(

A
+ B)


(A + B + C)(

A
+ B +

C
)(A + B +

C
)

 

Question 13

Product-of-Sum Boolean expressions all follow the same general form. As such, their equivalent logic gate circuits likewise follow a common form. Translate each of these POS expressions into its equivalent logic gate circuit:


(A + B)(A +

B
)


(A +

B
)(

A
+ B)


(A + B + C)(

A
+ B +

C
)(A + B +

C
)

 

Question 14

In an SOP expression, the minimum requirement for the expression’s total value to be equal to 1 is that at least one of the product terms must be equal to 1. For instance, in the following SOP expression, we know that the value will be equal to 1 if ABC = 1 or if A[B] [C] = 1 or if AB[C] = 1:


ABC + A

B

C
+ AB

C

What is the minimum requirement for a POS expression to be equal to 0? Take the following POS expression, for instance:


(A + B + C)(A +

B
+ C)(

A
+ B + C)

At the very least, what has to occur in order for this expression to equal 0?

 

Question 15

Examine the following truth table:



We know that this table represents the function of a NAND gate. But suppose we wished to generate a Boolean expression for this gate as though we didn’t know what it already was, and we chose to generate an SOP expression based on all the “high” output conditions in the truth table:



A

B
+

A
B + A

B

Seems like a lot of work for just one gate, doesn’t it? The fact that this truth table’s output is mostly 1’s causes us to have to write a relatively lengthy SOP expression. Wouldn’t it be easier if we had a technique to generate a Boolean expression from the single zero output condition in this table? If we had such a technique, our resulting Boolean expression would have a lot fewer terms in it!

We know that a Negative-OR gate has the exact same functionality as a NAND gate. We also know that a Negative-OR gate’s Boolean representation is [A] +[B]. If there is such a thing as a technique for deriving Boolean expressions from the “0” outputs of a truth table, this instance ought to fit it!

Now, examine the following truth table and logic gate circuit:



Derive a Boolean expression from the gate circuit shown here, and then compare that expression with the truth table shown for this circuit. Do you see a pattern that would suggest a rule for deriving a Boolean expression directly from the truth table in this example (and the previous example)?

Hint: the rule involves Product-of-Sums form.

 

Question 16

Examine this truth table and then write both SOP and POS Boolean expressions describing the Output:


A B C Output

0 0 0 1

0 0 1 0

0 1 0 1

0 1 1 0

1 0 0 0

1 0 1 1

1 1 0 1

1 1 1 0


Which of those Boolean expressions is simpler for this particular truth table? Which will be easier to reduce to simplest form (for the purpose of creating a gate circuit to implement it)?

 

Question 17

Write a POS expression for this truth table, and then draw a ladder logic circuit corresponding to that expression:


A B C Output

0 0 0 1

0 0 1 1

0 1 0 1

0 1 1 1

1 0 0 1

1 0 1 0

1 1 0 1

1 1 1 1

 

Question 18

Write a Boolean expression for this truth table, then simplify that expression as much as possible, and draw a logic gate circuit equivalent to that simplified expression:


A B C Output

0 0 0 1

0 0 1 1

0 1 0 0

0 1 1 1

1 0 0 0

1 0 1 1

1 1 0 1

1 1 1 1

 

Question 19

Write a Boolean expression for this truth table, then simplify that expression as much as possible, and draw a logic gate circuit equivalent to that simplified expression:


A B C Output

0 0 0 1

0 0 1 1

0 1 0 1

0 1 1 1

1 0 0 1

1 0 1 1

1 1 0 0

1 1 1 0

 

Question 20

Write two Boolean expressions for the Exclusive-OR function, one written in SOP form and the other written in POS form. Show through Boolean algebra reduction that the two expressions are indeed equivalent to one another. Then, draw the simplest ladder logic circuit possible to implement this function.

 

Question 21

A seven segment decoder is a digital circuit designed to drive a very common type of digital display device: a set of LED (or LCD) segments that render numerals 0 through 9 at the command of a four-bit code:



The behavior of the display driver IC may be represented by a truth table with seven outputs: one for each segment of the seven-segment display (a through g). In the following table, a “1” output represents an active display segment, while a “0” output represents an inactive segment:


D C B A a b c d e f g Display

0 0 0 0 1 1 1 1 1 1 0 “0”

0 0 0 1 0 1 1 0 0 0 0 “1”

0 0 1 0 1 1 0 1 1 0 1 “2”

0 0 1 1 1 1 1 1 0 0 1 “3”

0 1 0 0 0 1 1 0 0 1 1 “4”

0 1 0 1 1 0 1 1 0 1 1 “5”

0 1 1 0 1 0 1 1 1 1 1 “6”

0 1 1 1 1 1 1 0 0 0 0 “7”

1 0 0 0 1 1 1 1 1 1 1 “8”

1 0 0 1 1 1 1 1 0 1 1 “9”


Write the unsimplified SOP or POS expressions (choose the most appropriate form) for outputs a, b, c, and e.

 

Question 22
Don’t just sit there! Build something!!

Learning to analyze relay circuits requires much study and practice. Typically, students practice by working through lots of sample problems and checking their answers against those provided by the textbook or the instructor. While this is good, there is a much better way.

You will learn much more by actually building and analyzing real circuits, letting your test equipment provide the änswers” instead of a book or another person. For successful circuit-building exercises, follow these steps:

1.
Draw the schematic diagram for the relay circuit to be analyzed.
2.
Carefully build this circuit on a breadboard or other convenient medium.
3.
Check the accuracy of the circuit’s construction, following each wire to each connection point, and verifying these elements one-by-one on the diagram.
4.
Analyze the circuit, determining all logic states for given input conditions.
5.
Carefully measure those logic states, to verify the accuracy of your analysis.
6.
If there are any errors, carefully check your circuit’s construction against the diagram, then carefully re-analyze the circuit and re-measure.

Always be sure that the power supply voltage levels are within specification for the relay coils you plan to use. I recommend using PC-board relays with coil voltages suitable for single-battery power (6 volt is good). Relay coils draw quite a bit more current than, say, semiconductor logic gates, so use a “lantern” size 6 volt battery for adequate operating life.

One way you can save time and reduce the possibility of error is to begin with a very simple circuit and incrementally add components to increase its complexity after each analysis, rather than building a whole new circuit for each practice problem. Another time-saving technique is to re-use the same components in a variety of different circuit configurations. This way, you won’t have to measure any component’s value more than once.

 


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