Industry White Paper

Parasitic Extraction of MIM/MOM Capacitor Devices in Analog/RF Designs

August 04, 2020 by Mentor Graphics

Overview

Major advances in communications technology offer new opportunities and challenges for radio frequency design. 5G, the fifth generation of cellular technology, promises to deliver increased speed and improved flexibility of wireless services while reducing latency. The Internet of Things (IOT), a network of smart devices connected to the internet to share data, combines with mobile applications to drive new performance requirements, such as improved integration, more efficient power management, and high RF/mmWave performance. Many different industries and services, from business to education to entertainment to transportation, are expected to reap the benefits. However, while the 5G mobile network is projected to deliver unprecedented bandwidth and multi-gigabit data rates, it also faces power management challenges and high power linearity requirements.

When deciding which process technology is the right fit for their 5G or IoT applications, RF designers can choose from compact fin field-effect transistor (finFET) technologies or fully-depleted silicon-on-insulator (FDSOI) technologies, both of which can meet performance and power requirements while keeping process costs, complexity, and footprint low. These process technologies allow designers to integrate a wide spectrum of devices (e.g., high-performing RF/ mmWave transistors with logic devices) to address a variety of market segments, including mobile, IoT, analog, and RF/mmWave.

One thing all of these technologies have in common? Capacitors. Capacitors are an integral part of many analog/RF design applications, with metal-insulator-metal (MIM) and metal-oxide-metal (MOM) capacitors being widely used. However, process variations can affect capacitive accuracy and matching requirements, making accurate modeling both essential and more complex. In this white paper by Mentor, a Siemens Business, explore the design and parasitic extraction (PEX) challenges of capacitors in RF design applications and propose best practices to solve those challenges, illustrated by experimental results.

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