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Introducing Calibre nmLVS-Recon
OMRP (Openpattern Modular Routing Platform) is the first product-oriented project of the OpenPattern company. The target is to create a new open…
Huffman code is used in the most streaming applications. I have written a Huffman decoder for jpeg pictures. For audio or other data streams the…
Tiny Tate Bilinear Pairing core is for calculating Tate bilinear pairing. In fact it is a special type of Tate bilinear pairing called reduced…
This IP core provides resource efficient ternary adders, i.e., adders with three inputs performing s = x + y + z, for the Altera and Xilinx…
kvcordic is a collection of files comprising an implementation of a universal CORDIC algorithm (rotation/vectoring direction,…
Summary The Butterfly Light is an open source, modular FPGA development board. It is comprised of the USB Cocoon and the Spartan 3E Cocoon which…
If you liked our work is want to help contribute to the future progress of others who have seen help us by donating. ###…
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This project implements the simple and light protocol for transmission of data from low resources FPGA connected to the Ethernet PHY and an…
The FT2232H is a USB2.0 Hi-Speed USB Device to FIFO IC. This core allows the use of this chip with an FGPA design in high speed FT245 style…
Sata stack written in Verilog , , Staus: , , , ,Nysa SATA Github, , , Code Organization: , , sata_stack.v (Top File that applications interface…
Simple UART for FPGA is UART (Universal Asynchronous Receiver & Transmitter) controller for serial communication with an FPGA. The UART…
TCP Socket TCP Socket is a TCP/IP stack implementation. The core acts as a server, allowing a remote client to establish a bidirectional TCP socket…
This is a simple UART implementation with intention to valid ASIC learning and use it on simple applications. The environment was rebuild with…
=== What's "vSPI"? === vSPI is a Verilog implementation of an SPI slave. Think of it as a very fast serial port. It can reliably…
AES (Advanced Encryption Standard) is a specification published by the American National Institute of Standards and Technology in 2001, as FIPS…
WishboneAXI This project is a universal, configurable Wishbone AXI bridge together with Xilinx IP wrapper, which makes it suitable for Block Design…
Overview IOTA PoW needs a lot of computational power which makes sending transactions on smaller microcontrollers (like ARM) very slow. This is a…
SHA-3, originally known as Keccak [1], is a cryptographic hash function selected as the winner of the NIST hash function competition [2]. Because…
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