Or try an example search: AES128
Introducing Calibre nmLVS-Recon
Tiny Tate Bilinear Pairing core is for calculating Tate bilinear pairing. In fact it is a special type of Tate bilinear pairing called reduced…
Please write a description of the project here. It is used as a MetaTag (search engines looks at this).
Sata stack written in Verilog , , Staus: , , , ,Nysa SATA Github, , , Code Organization: , , sata_stack.v (Top File that applications interface…
TCP Socket TCP Socket is a TCP/IP stack implementation. The core acts as a server, allowing a remote client to establish a bidirectional TCP socket…
=== What's "vSPI"? === vSPI is a Verilog implementation of an SPI slave. Think of it as a very fast serial port. It can reliably…
AES (Advanced Encryption Standard) is a specification published by the American National Institute of Standards and Technology in 2001, as FIPS…
SHA-3, originally known as Keccak [1], is a cryptographic hash function selected as the winner of the NIST hash function competition [2]. Because…
Common Design Environment (CDE) is a library of modules that usually require replacement with specific hard macros when the design is retargeted to…
MyGPU is a library of large-scale components like FPU units, a processor and auxillary units which can be used to build SoCs, processors, etc. We…
The srdy-drdy library provides a group of components all built around a common data-transfer protocol. This protocol is used in datapath…
GroundHog 2009 is a benchmark suite for reconfigurable architectures in the mobile domain. The benchmark suite can be downloaded from…
n/a
FWRISC is a Featherweight RISC-V RV32I implementation. All instructions and registers are supported. Source is hosted on GitHub:…
Quick link to the design document v08.06: http://www.mediafire.com/view/vp3hb8phe3t5yh4Hive_Design_2015-09-03.pdf Quick link to everything…
The risc16f84 project is intended to provide a small, easy to use microcontroller in Verilog. The original code was VHDL, but I have done a…
Summary SSBCC.9x8 is a free Small Stack-Based Computer Compiler with a 9-bit opcode, 8-bit data core. It creates vendor-independent, high-speed,…
Texture mapping unit tailored for Milkdrop acceleration. This core was designed for Milkymist, a highly integrated opensource VJing platform. See…
The aim of this project is to provide a set of ARINC-429-compatible TX and RX synthesizable interfaces. The transmitting interface serializes a…
Open Source Documented Verilog UART Purpose This module was created as a result of my own need for a UART (serial line I/O) component and…
Don't have an AAC account? Create one now.
Forgot your password? Click here.