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Category: Crypto Core IP Cores (9)

AES Encryption All Keylength

Four stage pipeline design working at 361.890MHz on Xilinx's 28nm Kintex 7 speed grade 3 FPGA device. Calculating 4 blocks parallely,…

License : BSD
Language : VHDL

Avalon AES ECB Core (128, 192, 256 Bit)

General Description I know there are plenty of AES (Rijndael) implementations around. I created my own anyway because I was unhappy with either the…

License : BSD
Language : VHDL

GOST 28147-89 Core Implementation on Xilinx

This is a implementation of the GOST 28147-89 - a Soviet and Russian government standard symmetric key block cipher. GOST 28147-89 has a 64-bit…

License : BSD
Language : Verilog

GOST 28147-89 Block Cipher

The GOST block cipher, defined in standard GOST 28147-89, is a Soviet and Russian government standard symmetric key block cipher. Developed in the…

License : BSD
Language : Verilog

Mini Advanced Encryption Standard - Mini AES

Mini AES Advanced Encryption Standard (AES) implementation with small area/resources utilization. Features - Encryption and Decryption unit in…

License : BSD
Language : VHDL

Nugroho Free Crypto Cores

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License : BSD
Language : VHDL

Nugroho Free Hash Cores

Nugroho Free Hash Cores (NFHC) currently support SHA-1, SHA-256, SHA-512 from FIPS-180 standard.

License : BSD
Language : VHDL

Secure Hash Standard SHA256 Algorithm

SHA256 running at 199.788MHz on Xilinx's 28nm Kintex 7 speed grade 3 device. Processing speed: 1.598 Gbits per second. Also added an optimised…

License : BSD
Language : VHDL

Tiny Encryption Algorithm (TEA)

1 and 64 stage implementations of the Tiny Encryption Algorithm (TEA).

License : BSD
Language : VHDL