Search our IC Design Center for IP Cores and IC Design Related Content.

Or try an example search: SD Card Controller

Category: Prototype Board IP Cores (10)

DE1 Olimex LPC-L2294 System

This project uses two off the shelf boards and interfaces them. The processor board used is a Olimex LPC-L2294 and the FPGA board is a Terasic DE1.…

License : LGPL
Language : Verilog

aes220 High-Speed USB FPGA Mini-module

The aes220 is a High-Speed USB 2.0 FPGA based on the Cypress FX2 micro-controller and Xilinx Spartan3AN (XC3S200AN or XC3S400AN) FPGA. The…

License : LGPL
Language : Verilog & VHDL

KISS Board with MOTHER Board and FPGA Xilinx/Altera

, [Keep It Simple,Stupid] Board. The board was evaluated like [or1k/orp project]. BOARD consists of two pieces. One is FPGA board.…

Language : Verilog

PCI Card with Xilinx X3CS500E

part list Various: 5V input SMT jack 3.5mm (Ebay) PROG 10pin 2.54mm JTAG header (2.5V) D1,D2,D3 0805 led (marking cathode side) IO 20pins 20pins…

License : LGPL
Language : Verilog & VHDL

Enterpoint Raggedstone PCI Based FPGA Card

An inexpensive PCI FPGA development board This is a port of the Opencores PCI core ported to the Enterpoint Raggedstone1 PCI card. This is a very…

License : GPL
Language : Verilog

Technologic Systems TS-7300 FPGA Computer

Boilerplate Verilog for use in Technologic Systems TS-7300 FPGA computer at http://www.embeddedARM.com/epcts7300-spec-h.htm Implements bus cycle…

License : GPL
Language : Verilog

ZTEX USB-FPGA Module 2.14

USB-FPGA Module 2.14 is an Artix 7 FPGA Board with an USB 3.0 interface, 256 MB DDR3 SDRAM and Flash memory. Its available in 5 variants from…

License : GPL
Language : Verilog

ZTEX USB-FPGA Module 2.04

USB-FPGA Module 2.13 is an FPGA Board with Spartan 6 XC6SLX16 FPGA, USB 2.0 controller, 66 MByte DDR SDRAM, Flash, many GPIO's and on-board…

License : GPL
Language : Verilog

ZTEX USB-FPGA Module 2.13

USB-FPGA Module 2.13 is an Artix 7 FPGA Board with USB 2.0 controller, 256 MB DDR3 SDRAM, Flash, many GPIO's and on-board voltage regulators.…

License : GPL
Language : Verilog

Game-Trees FPGA Implementation (Othello Game)

A Game Tree is a directed graph whose nodes are states of a game. A game state is a configuration of the game on a specific time. The complete game…

License : GPL
Language : Verilog