Or try an example search: 8 bit multiplier
Introducing Calibre nmLVS-Recon
This application parses a Verilog define file and presents a GUI to the user
A platform for execute simple games, with graphics in two dimensions, implemented on Altera DE2-115 development board. • Compatible with Sega…
Usage and Operation In order to operate the circuit correctly it must first be reset (asynchronously). Below is a timing diagram that illustrates…
AVALON/WISHBONE Bridge This is an Avalon to WishBone Bridge. Avalon is a bus standard mainly used in Altera(Now Intel) Tools. Wishbone as every one…
simple fast bubble sort module in verilog
This is an easily configurable systolic array of processors to compute the optimal alignment between two DNA sequences. It supports affine gap…
Files also located at: https://github.com/DarkwaveTechnologiesCray-2-Reboot The goal of this project is to make a clock and gate equivalent…
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Reverse engineered SystemVerilog RTL version of the Yamaha OPL3 (YMF262) FM Synthesizer chip. Design is complete and working on the Digilent ZYBO…
PSG32 is an audio interface circuit (sound interface device) for use within a programmable system to interface the system to an audio output. It…
Pulse Width Modulator Features • Work as one PWM or one timer. • 16 bits main counter. • PWM/Timer can choose between Wishbone…
Module receives A and B quadrature signals from incremental angular sensor and counts relative angular position. Angular resolution is 4 counts per…
Simple linear digital automatic gain control. More info: https://www.embedded.com/print/4214571
A simple module to get the most of your on board heartbeat LED. Change or add more sequences easily in parameters file.
A SystemC/Verilog random number generator based on the combination of a LFSR and a CASR with very good statistical properties. Based on the Thomas…
An Virtual RS232 Terminal developed with Avnet Xilinx Spartan 3A Evaluation Kit ( Spartan XC3S400A ) that has a LVDS LCD Controller (Notebook LCD…
Hi, Everyone, You can find detailed information about project in this pdf. The pdf explains most of the things about the project like: 1. Port list…
Overview Veristruct is an an IEEE1364.1995 preprocessor that adds some C-style struct support to the Verilog language. It takes as input Veristruct…
A AHB master to WishBone slave bridge along with a basic testbench is included. Burst in not yet supported.
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