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Category: Uncategorized IP Cores (34)

2D Game Console on Altera DE2-115

A platform for execute simple games, with graphics in two dimensions, implemented on Altera DE2-115 development board. • Compatible with Sega…

License : LGPL
Language : Verilog & VHDL

Library of Commonly Used Base Functions

About this core This is a collection of commonly used base functions, used in all of ASTRONs other cores. These source files can work in any…

License : LGPL
Language : VHDL

16x2 LCD controller for Xilinx

Controller for 16 character - 2 line LCD displays as used on various Xilinx evaluation boards. Features - 4-bit LCD data interface - One…

License : LGPL
Language : VHDL

BigCounter for Xilinx FGPA

Uses the shift register technology to create a big counter, that gives out a pulse at the period specified as a generic Features Designed for…

License : GPL
Language : VHDL

Open Source FPGA Bitcoin Miner for Altera and Xilinx

n/a

License : LGPL
Language : VHDL

RFC 1951 - DEFLATE Data Compression Algorithm

A VHDL implementation of the open DEFLATE data compression algorithm. The DEFLATE standard is specified in RFC 1951 and was jointly developed by…

License : GPL
Language : VHDL

G729A Codec for 16-bit LPCM Audio

G.729A codec core performs encoding and decoding of 16-bit LPCM audio samples according to ITU-T G.729A standard. The codec core supports multiple…

License : LGPL
Language : VHDL

Fuzzy Logic Hardware Accelerator Wishbone Compatible

This project is to design a Fuzzy Logic Hardware Accelerator (FLHA) that is WishBone compatible. FLHA is capable of generating fuzzy rule matrix…

License : GPL
Language : VHDL

XmatchPro High-speed Lossless Data Compressor

Benefits of data compression The use of lossless data compression can bring about a number of increasingly important benefits to an electronic…

License : LGPL
Language : VHDL

General-purpose FPGA Pulse-processing Algorithm

n/a

License : LGPL
Language : VHDL

Efficient Hardware Looping Unit

Hardware looping unit Tha main purpose of the hardware looping unit (HWLU) is to enhance program control units found in modern microprocessors, by…

License : GPL
Language : VHDL

IMA ADPCM Sound Compressor with Testbench

This project features a full-hardware sound compressor using the well known algorithm: IMA ADPCM. The core acts as a slave WISHBONE device. The…

License : GPL
Language : VHDL

Keyboard Controller with Simple Debounce Algorithm

The controller scans the keyboard by making a different column in "rows" logic-0 therefor the inputs "cols" have to be PULL-UP…

License : GPL
Language : VHDL

Oscilloscope VHDL for Xilinx Spartan-3E at 160MSPS

This is an experimental oscilloscope VHDL design working on the Xilinx Spartan-3E starter board. The analog signal is sampled with a TI ADC08200…

License : LGPL
Language : VHDL

LPD8806 RGB LED String Driver in VHDL

Have you ever wanted to add some color to your project? Then this might be your answer. The LPD8806 RGB LED strings are available for low cost from…

License : LGPL
Language : VHDL

Configurable Modular Oscilloscope Function

The aim of the project is to develop oscilloscope functions (conversion control, trigger, FFT, ...) in several cores and implement a usefull…

License : LGPL
Language : VHDL

Multiple Switch Debounce Circuit in VHDL

Description This block is a general-purpose multiple input de-bouncing circuit. It handles multiple inputs, like mechanical switch inputs, and…

License : LGPL
Language : VHDL

Nios II Custom Instructions in VHDL

n/a

License : LGPL
Language : VHDL

P9813 Led Driver IC (Chainable RGB LED)

There is a type of RGB LED from Grove called the "Chainable RGB LED", which uses the P9813 driver IC. This core drives a string of those.…

License : LGPL
Language : VHDL

Open Hitter for Traded Options and Futures

This project will provide a working demonstration project for developers new to fpga. The core 'hitter' is a component that listens to…

License : LGPL
Language : VHDL