DRAM Innovation Treks On as Samsung and Others Scale Production
Semiconductor companies are driving advancements in DRAM, pushing the boundaries of performance, density, and efficiency. Here's some recent examples.
Dynamic Random Access Memory (DRAM) has long been essential for modern computing, providing fast and volatile storage for various applications. However, as demands for performance and memory density continue to rise, DRAM faces challenges with scaling down to and beyond the 10 nm process.
Samsung's new 12 nm DRAM, discussed in more detail below. Image used courtesy of Samsung
Despite these hurdles, DRAM manufacturers continue to push the boundaries with innovative approaches. This article discusses a few new advancements in the DRAM industry and explores the technologies enabling the progress of these memories.
First, Why Is DRAM So Hard to Scale?
One of the primary issues of scaling DRAM is reducing cell capacitance, which can affect memory density and data retention. DRAM manufacturers have adopted various strategies to deal with this problem. One approach is using advanced materials, such as high-k dielectrics, which enhances the capacitance of individual cells.
A crucial development in this technology is three-dimensional (3D) integration. By vertically stacking multiple layers of memory cells, manufacturers bypass the limitations imposed by 10 nm scaling in the lateral dimension. This vertical architecture has been critical for scaling since multiple layers do not affect performance.
Diagram of a conventional DRAM cell. Image used courtesy of Carnegie Mellon University
Advanced lithography methods also help with DRAM scaling. New techniques, like extreme ultraviolet (EUV) lithography, have emerged to overcome the limitations of traditional optical lithography. They allow manufacturers to achieve finer dimensions and enhance the overall performance of DRAM cells. Beyond advanced materials, integration, and lithography, developers have proven that innovative circuit design and fabrication processes can also play an integral role in addressing DRAM size. Below are a few examples of companies doing just that.
Samsung's 12 nm DRAM and First CXL DRAM
Samsung has been a major player in the DRAM industry for many years. Recently, the company made significant strides with its 12 nm DRAM and the industry's first CXL (Compute Express Link) DRAM.
The CXL DRAM. Image used courtesy of Samsung
According to Samsung, the new 16 GB, 12 nm DDR5 DRAM features refined circuitry, optimized cell structures, and low-operating voltage, reducing power consumption by up to 23% while increasing wafer productivity by up to 20%. It features a maximum speed of 7.2 Gbps, which is made possible by a new high-κ material that helps increase cell capacitance. The high capacitance makes it easier to distinguish data signals and reduce noise.
Last December, Samsung successfully evaluated its 16-GB DDR5 DRAM for compatibility with AMD and is currently collaborating with IT companies worldwide to push its innovations in the next-generation DRAM market.
With its first 128 GB CXL DRAM built on CXL 2.0, Samsung aims to bridge the gap between memory and high-performance computing. It supports PCle 5.0 interface (x8 lanes) and offers a bandwidth of up to 35 GB per second. Moreover, the device is said to enable dynamic memory allocation, efficient data movement, and shared memory pools, empowering developers to optimize memory resources for specific application requirements.
Memory pooling involves binding multiple CXL memory blocks on a server platform to form a pool and allowing hosts to allocate memory from the blocks as required. This approach maximizes efficiency and lowers operating costs.
Micron to Scale DRAM in Japan With EUV Lithography
Manufacturers such as Micron, SK Hynix, and other industry frontrunners recognize the critical role of extreme ultraviolet (EUV) lithography in pushing their DRAM portfolios. Micron has made significant investments in EUV lithography because of its exceptional resolution capabilities, enabling the creation of smaller and more precise features within DRAM cells.
Micron's LPDDR5 memory. Image used courtesy of Micron
Micron has announced plans to introduce EUV lithography in Japan for the first time to manufacture its next generation of DRAM, the 1-gamma (1γ) node. The 1-gamma node follows the 1-beta node, one of the most advanced DRAM nodes today, which Micron mass produces in its Hiroshima fab. The company believes the EUV technology will allow faster, more power-efficient, and higher-performance memory products. It plans to produce a 1-gamma node in Taiwan and Japan from 2025 onwards.
NEO Semiconductor Creates 3D X-DRAM
While memory leaders dominate the DRAM landscape, startups like NEO Semiconductor are making significant strides by embracing innovative approaches to DRAM technology. In particular, NEO Semiconductor recently launched a technology called 3D X-DRAM that leverages 3D integration to overcome the limitations of conventional DRAM.
3D X-DRAM cell structure. Image used courtesy of NEO Semiconductor
The company's approach involves stacking multiple memory layers vertically, enabling increased memory density and improved performance without compromising power efficiency. By using vertically stacked layers, accessing data can be done more efficiently, which results in reduced latency and increased memory bandwidth.