NXP Announces Crossover MCU Family for Edge Device Voice Recognition
The i.MX RT600 family combines ultra-low power with small size for voice-based machine learning applications.
NXP has announced a new family of crossover MCUs designed to address the challenges of performance, security, and cost while conserving board space. The i.MX RT600 family is said to deliver powerful machine learning (ML) capabilities down to the very edge of the IoT.
The device is built on Arm's Cortex-M33 processor IP, running at speeds of up to 300 MHz. It also features NXP’s Edge-Lock, designed for advanced embedded security.
Block diagram of for the i.MX RT600 family. Image used courtesy of NXP
Cadence’s Tensilica Hi-Fi 4 audio/voice digital signal processor is an optional feature. This DSP features a quad 32 x 32 multiplier/accumulator and runs at speeds of up to 600 MHz.
Up to 4.5 MB of on-chip SRAM is available and an octal/quad SPI interface; an on-the-fly decryption engine is available to access off-chip flash.
The device also offers 128 KB of memory dedicated specifically to the DSP CPU. There is also 96 KB of instruction and data (I & D) cache memory for DSP access to shared system SRAM.
Advanced security is of vital concern to designers working on IoT edge devices. As such, the i.MX RT600 family offers a physical unclonable function (PUF) key generation module as well as a SHA1/SHA2 secure hash algorithm module that supports secure boot. There is also an AES256 encryption module and a random number generator (RNG).
Designers employing the new family of crossover MCUs will have the support of NXP's MCUXpresso suite of tools and software. This includes driver, IDE, and middleware support.
Cadence's IDE, DSP, IDE, and Xplorer function libraries and audio codecs are also available for developers.
Another software resource comes from Alango Technologies, with sensory and DSP concepts that provide audio libraries and tools, voice pre-processing, and recognition software.
NXP’s eIQ for Glow neural network compiler, now in pre-production, will support the i.MX RT600 and other NXP crossover MCUs by first converting the neural networks into object files.
The eIQ-GLOW block diagram. Image used courtesy of NXP
The result is a binary image with a smaller memory footprint for improved performance.
Members of the i.MX RT600 MCU Family
There are currently two members of the i.MX RT600 family available: the MIMXRT685SFVKB and the MIMXRT633SFVKB.
Members of the i.MX RT600 family. Image used courtesy of NXP
In the above table, devices with an asterisk are not yet available.
Members of this family of crossover MCUs are aimed at:
- Machine language-based edge products
- Audio subsystems
- Voice recognition capabilities for consumer devices
- Voice-enabled IoT applications
The i.MX RT600 EVK (MIMXRT685-EVK) gives designers a leg up on developing products based on the i.MX RT600 family of crossover MCUs.
The i.MX RT600 EVK. Image used courtesy of NXP
The unit is aimed specifically at the development of the MIMXRT685SFVKB and the MIMXRT633SFVKB.
Arm and NXP Team Up for Arm Ethos-U55
Arm IP already serves at the core of the i.MX RT600 family of crossover MPUs and elsewhere in the NXP universe.
Now, NXP has announced that it will play a “lead partnership” with Arm in the development of the Arm Ethos-U55, a microNPU (Neural Processing Unit).
This new device will be an ML accelerator targeted, again, at IoT applications where cost and board savings are critical. The Ethos-U55 will, as expected, work hand-in-glove with the Cortex-M core. NXP expects that “when paired with the Cortex-M55 processor, it provides a 480x uplift in ML performance over previous generation Cortex-M processors.”