To Accelerate Edge Design, Cadence Introduces New NPUs and SDK to AI IP

September 18, 2023 by Aaron Carman

The new NPUs offload from any host processor to facilitate on-device edge computing.

Cadence Design Systems has revealed its newest AI IP and software to address the growing need for edge AI performance. As generative AI and machine learning models become more commonplace in edge devices, Cadence’s latest IP offers designers a way to accelerate AI performance without requiring a major custom design effort.


Cadence’s latest AI IP

Using the latest Cadence IP, designers can develop hardware and software to accelerate AI design for the edge. Image used courtesy of Cadence

As system architects move basic computation to the edge and leave centralized servers to focus on more intense tasks, designers must balance the performance of their AI models with the required computational load to create practical edge devices. Cadence claims that its new IP allows designers to boost the on-chip performance of AI for better edge processing.


Neo Neural Processing Units: On-Chip AI IP

Cadence’s announcement revealed new hardware blocks, including Neo Neural Processing Units (NPUs) built to scale performance for a target application.

The Neo NPUs can be scaled from 8 GOPS to 80 TOPS in a single core, with multicore systems able to reach hundreds of TOPS. In addition, the multiply-accumulate (MAC) performance is extensible across a broad range, with MACs per cycle ranging from 256 K to 32 K. The Neo IP is also flexible, with support for Int4 to FP16 data types.



The Neo NPU can interface directly with the main processor to offload AI computation and improve the performance of AI applications at the edge. Image used courtesy of Cadence

All of these specs translate directly to performance and efficiency increases. Cadence reports that the Neo NPUs offer 20x higher performance compared to the company's first-generation AI IP, with up to 5x more inferences per second (IPS) per area and 10x more IPS per watt.


Software Support to Match

In addition to Cadence's hardware developments, the EDA company also introduced the NeuroWeave SDK to enable “no-code AI development.” This software stack complements the new hardware IP and is expected to provide developers with an all-in-one tool for AI development and evaluation.


NeuroWeave SDK

The NeuroWeave SDK gives developers a turnkey solution to develop both the hardware and software required for edge AI. Image used courtesy of Cadence

Built into the SDK are several tools that can make the designer’s job easier. In addition to simulating and evaluating AI workloads, the software provides designers with key metrics to intuitively hone the performance of their models. The software also enables hardware/software co-design by allowing developers to tune both hardware and software parameters in a single environment.

In addition to the Neo NPU, the NeuroWeave SDK can also work directly with Tensilica DSP IP and Neural Network Engines.


Cadence Aims to Accelerate AI Deployment

The promise of AI and ML models has taken the computing world by storm, prompting companies such as Cadence to bolster their AI IP portfolio. As more of this computing power is placed at the edge versus central servers, the Cadence hardware and software IP may be useful to designers working on a tight power and area budget. While edge devices may not practically match the performance of server-grade AI models, Cadence's distributed computing architecture could make AI become much more prevalent in day-to-day life.