Sam Naffziger Senior VP, Corporate Fellow, and Product Technology Architect Samuel Naffziger is an AMD Senior Vice President, Corporate Fellow, and Product Technology Architect. He has over 32 years of industry experience with a background in microprocessors and circuit design at Hewlett Packard, Intel, and AMD. He is an industry expert on processor design, architecture, and implementation with a focus on power-performance-area (PPA) optimization and package technology. Naffziger has been the lead innovator behind many of AMD’s low-power features and chiplet architecture. At AMD, Naffziger led the power optimization of CPUs and APUs (accelerated processing units), producing the Zen processor line of desktop, server, and notebook processors. He is responsible for many power management innovations at AMD and in the industry such as Adaptive Voltage and Frequency Scaling (AVFS) and adaptive clocking. In addition, Naffziger has led many packaging innovations at AMD including the Rome and Milan server chiplet-based designs. Most recently, his work on improving PPA for GPUs led to the release of RDNA2 products which provide industry-leading operating frequency and performance per Watt. As SVP and product technology architect, Naffziger focuses on product technology choices for the best power/performance/area combination to maximize product competitiveness, efficiency, and cost across AMD product lines. Naffziger received a BS in Electrical Engineering from the California Institute of Technology (Caltech) and an MS in Computer Engineering from Stanford. He holds more than 130 U.S. patents and has authored dozens of publications and presentations on processors, architecture, and power management.

AMD Senior VP and Low-Power Guru, Samuel Naffziger, Addresses the Looming Electronics Power Challenge

In partnership with AMD

The explosive growth in electronics systems and compute-intensive workloads are pointing toward a significant, and potentially unsustainable, increase in energy use. Samuel Naffziger, AMD Senior Vice President and Corporate Fellow, has been the lead innovator behind many of AMD’s low-power features and is leading the next generation of developments to address these energy challenges.

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