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Enabling Industrial Network Design with Time-Sensitive Networking

OT (operational technology) and IT (informational technology) may have different real-time needs, but they're merged in the TSN (time-sensitive networking) Ethernet-based standards. Learn about the theory and hardware involved in implementing TSN in industrial network design.

August 12, 2021 by Christian Castel, NXP

Optimizing Power Management with NXP’s i.MX RT500 Crossover MCU

This article provides an introduction to microcontroller power management concepts. The NXP i.MX RT500 family of crossover MCUs will be used to provide examples of how these power management concepts can be employed by embedded developers in their applications.

July 08, 2021 by Alejandra Guzman, NXP Semiconductors

Understanding the Heterogeneous Graphics Pipeline of i.MX RT1170 MCUs

In this article, learn about the heterogeneous graphics pipeline of the i.MX RT1170 MCU and its three main graphics acceleration engines.

March 18, 2021 by Hugo Osornio, NXP Semiconductors

Nine Factors to Consider for Board-Level Machine Vision Camera Integration

Leveraging board-level cameras offer a variety of benefits. To help identify the right mix of features and design elements, here are some factors to consider when selecting and designing in an embedded machine vision camera.

February 11, 2021 by Brian Cha, FLIR

How the PowerQuad Co-processor Frees Up CPU Cores in the LPC55S69 MCU

In this article, learn about the PowerQuad co-processor and its role in performing CPU-heavy tasks to allow the Arm Cortex-M33 cores to execute other tasks in the LPC55S69 MCU.

November 19, 2020 by Eli Hughes, NXP Semiconductors

Getting Started With the LPC5500 Series MCU Using NXP’s MCUXpresso IDE

This article introduces the MCUXpresso IDE, introducing important features and showing how to get started with programming the LPC65500 series MCU using a Hello World example.

June 11, 2020 by Mark Dunnett, on Behalf of NXP

The Role of Last-Level Cache Implementation for SoC Developers

There is a challenge for SoC developers to find ways to navigate the demand of memory in their design. This article looks at how a fourth, or last-level, cache can provide a solution.

May 12, 2020 by Kurt Shuler, Arteris

How RISC-V Security Stacks Strengthen Computer Architecture

In this article, Ted Speers of Microchip reflects on how RISC-V and its security stack offer a solution for the development of computer architecture and processor security.

November 26, 2019 by Ted Speers, Microchip

GPIO Interrupt Comparison for Three Popular Microcontrollers from TI, Microchip, and STMicro

Compare the GPIO interrupts of three popular microcontrollers: the Texas Instruments CC2544, the Microchip ATmega328P, and the STMicroelectronics STM32L151C6.

October 05, 2019 by Philip Asare

Interrupts for Peripherals: Timers, Serial Communication, and ADCs

Learn about interrupts for some familiar peripherals: timers, serial communication, and ADCs.

October 03, 2019 by Philip Asare

Principles of Cache Design

This article will examine principles of CPU cache design including locality, logical organization, and management heuristics.

July 11, 2019 by Stephen St. Michael

Decreasing the Length of Design Cycle in Co-Designed SoCs with Renode

In this article, we explain how the use of open-source functional simulators like Antmicro’s Renode can be an integral part of hardware-software co-design efforts.

April 16, 2019 by Greg Sullivan, Dover Microsystems

How to Choose Microcontroller Peripherals for Digital Signal Processing Applications

This article continues a discussion of microcontroller features and characteristics that are particularly important when you’re thinking in terms of DSP capabilities.

April 08, 2019 by Robert Keim

What Is a Microcontroller? The Defining Characteristics and Architecture of a Common Component

In this article we’ll look at the defining characteristics of these extremely popular ICs, and then we’ll explore the internal architecture.

March 25, 2019 by Robert Keim

What Is a Microarchitecture? Understanding Processors and Register Files in an ARM Core

Learn about the microarchitecture of an ARM processor, including an explanation of the register file and how it functions within a processor.

February 07, 2019 by Stephen St. Michael

Embedded System Design: Build from Scratch or Use an SBC?

This article explores the pros and cons of either designing embedded systems from scratch or utilizing pre-made single-board computers.

November 29, 2018 by Rudy Ramos, Mouser

How to Use Your Computer to Generate Complex Analog Waveforms

This article presents Scilab code that allows you to generate I/Q, noise, and chirp signals from your PC’s headphone jack.

October 11, 2018 by Robert Keim

How to Use Your Computer as an Arbitrary Waveform Generator

In this article, we’ll use Scilab to generate numerical signals that can be converted into analog waveforms by a computer’s audio hardware.

October 08, 2018 by Robert Keim

What Is a PLC? An Introduction to Programmable Logic Controllers

What is a PLC? This article will lay out a succinct definition of what a programmable logic controller is and lay out its basic components.

October 03, 2018 by Stephen St. Michael

The Electrical Engineer’s Guide to Instruction Set Architectures (ISAs)

This article explores some important details related to the design and functionality of processors.

August 15, 2018 by Robert Keim