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Design Project: Logic Probe
5 questions By Tony R. Kuphaldt
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Question 1 of 5
What factors determine where potentiometers Rpot1 and Rpot2 must be set? Why are they “trimmer” potentiometers (as indicated by the special wiper symbol) and not regular panel-mount potentiometers?
Reveal answerThe acceptable “high” and “low” voltage levels for which ever logic family is being trouble-shot will dictate where these potentiometers must be set.
Notes:Do not simply tell your students what these acceptable voltage levels are! Let them research datasheets for instances of logic gates within the logic family desired, and let the manufacturers’ data tell them what they need to know.
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Question 2 of 5
What performance parameters are important to consider for U1 and U2, considering their use in a logic probe circuit? Hint: we may want to use this logic probe to troubleshoot CMOS as well as TTL circuits.
Reveal answerFirst and foremost, we need to consider the supply voltage ranges for all integrated circuits used in this circuit. Do not use 7400-series TTL NAND gate for U2 if you ever plan to use this logic probe on digital circuits with power supply voltages in excess of 5 volts!
Notes:Note how the comparators sink current from the LEDs rather than source current to them. This design feature was necessary, due to the construction of the LM339. In fact, there are a lot of comparators that can only sink current and not source current due to the internal use of an open-collector output stage.
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Question 3 of 5
What purpose do resistors R1 and R2 serve, and why are they so large (1,000,000 ohms each)?
Reveal answerIf they were not in the circuit, the logic probe would indicate a “high” condition with the probe floating. In place, the resistors force an “indeterminate” state with a floating probe.
Notes:A less obvious feature of these resistors is that they force the circuit under test to drive a bit of current to (or from) the probe. This is good, as it may help to show a gate with a “weak” output, such as one that is mildly overloaded. Lower values for R1 and R2 would accentuate this feature, but would also make it trickier to set the high/low threshold potentiometers (Rpot1 and Rpot2).
Another not-so-obvious design feature is that resistors R1 and R2 establish a default input voltage level that is between the two threshold settings established by the potentiometers. In my first design, I connected R1 and R2 to the power supply rails, respectively. This set the default (floating) input voltage at 1/2 V, which worked fine for CMOS logic levels but not for TTL. By having the resistors set a default input voltage between the two threshold adjustments, a floating probe is guaranteed to indicate “indeterminate” no matter where the threshold potentiometers are set.
