The company attended ISSCC with some big automotive announcements: a new approach to chiplet-based processing and a configurable 3-nm memory architecture.
New research explores ultra-low-k COF dielectrics, screens topological conductors for nanoscale wires, and reveals high-pressure hexagonal GeSn alloys.
The 40 nm Arm Cortex-M4F device combines 256 KB flash, CAN FD, and ASIL-B positioning for NEV subsystems.
The W3510E workflow targets pre-layout modeling, EM analysis, and early UCIe and BoW validation for advanced AI infrastructure designs.
As system power requirements increase due to AI adoption everywhere, systems are continuing to migrate to 48V distribution to reduce I2R interconnect and PCB losses.
Explore the latest innovations, challenges, and future trends shaping next‑generation wearable electronics—from advanced materials to AI‑powered sensing.…
The device technology co-optimization (DTCO) methodology requires generating large numbers of layouts. This article introduces a few ways of speeding up this…
The five 1200 V SiC MOSFET power modules support up to 200 A for automotive, energy, and industrial systems.