In this article, we will look at the characteristics of the SiC JFET and how these characteristics are suited for circuit protection applications.

JFETs which are normally-ON, that is on with zero gate-source voltage, are often passed over for switching circuits as being difficult to drive and protect despite their excellent electrical performance. However, the normally-ON characteristic is a benefit in protection circuits such as current limiters and solid-state circuit breakers where a default to the device conducting is preferred.

Silicon Carbide (SiC) JFETs are particularly useful in these applications with their extreme tolerance to high peak junction temperatures and low channel resistance for a given die area. With well-defined saturation current and very fast switching, they can be used in applications such as lightning protection, inrush current limiting and as a replacement for slower mechanical circuit breakers. 


Overcurrent Circuit Protection: Where and When You Need It

Some of the power and associated current levels in modern electronics are truly impressive; it’s now commonplace to see hundreds of amps processed across circuit boards, especially in intensive data processing applications, and in AC distribution the sky is the limit.

However, all well-designed systems need a way to limit or isolate current under fault or transient conditions, from lightning strikes for example. As a consequence, the technology of current limiters and circuit breakers has had to keep pace with power conversion in efficiency and robustness.

Efficiency is an issue when the protection circuit is not tripped; it must drop as little voltage as possible for minimum energy loss under normal conditions. Robustness is equally important, especially as the circuit ideally sits idle for most of its life; when needed it has to operate immediately and effectively at an unknown stress level. Closely managed critical systems might exercise the protection regularly with simulated faults as a check, but for most, this would be an unbearable overhead and adequate robustness must be simply designed in.


Limiting Current

It’s often a requirement to limit fault current to a particular value rather than just disconnect it, as a fuse would, as it would usually be preferable for a supply to recover from a fault automatically rather than it needing user intervention. The overcurrent might even be expected, for example, inrush current into capacitors on power supply start-up. Of course, there are also applications where limiting current is the function of the equipment itself such as with electronic loads.

Traditional current limiters have ranged from resistors through PTC thermistors at low currents to active circuits that give minimum loss and maximum control at higher currents. Among the active circuits you can typically see varieties using bipolar transistors (BJTs) and MOSFETs. The choice will depend on the current and cost: the constant VCESAT drop of a BJT might give lower loss than the resistive drop of a MOSFET at high currents.

At lower currents, low RDS(ON) MOSFETs might give near zero loss but at higher expense. MOSFETs also can be paralleled to good advantage; two parallel BJTs sharing a fixed current i, will, to a first order, each have half the power loss of a single device (VCESAT x i/2). Two parallel MOSFETs, each with half the current will each have a quarter of the dissipation of a single device ((i/2)2 x RDS(ON)). Actually, this may be even better because temperature rise in each MOSFET will be much less than with a single device and RDS(ON), with its positive temperature coefficient, will therefore also be lower in each device.

MOSFETs can run into problems though in these applications. By definition, current is being limited by dropping voltage producing significant constant dissipation, so the Forward Safe Operating Area (FSOA) of the device must be considered and its variability with temperature and bias conditions.

Something that the FSOA graphs don’t show though is the effect of localized current ‘crowding’ that can produce hot-spots and failures, even if the device overall seems to be within its FSOA. The effect is caused by the positive temperature coefficient of gate threshold voltage allowing more current at high temperatures. When this effect exceeds the current limiting caused by the positive temperature coefficient of channel resistance and with local cell variation in VGTH, thermal runaway can happen. Figure 1 gives a representation of how a hot spot could be nearly 100°C higher than the average.


Representation of 5x5 mm power MOS temperature distribution (°C) clearly showing the hot spot phenomenon

Figure 1. Representation of 5x5 mm power MOS temperature distribution (°C) clearly showing the hot spot phenomenon.


As with any current limiting action, some method of sensing current is necessary. With BJTs and MOSFETs, practically this has to be a lossy resistor or expensive hall-effect device. The RDS(ON) of a MOSFET does drop proportional voltage to the current but is difficult to calibrate with its natural variation and temperature dependence. The saturation current of a MOSFET also can’t be relied on as a limit due to its variability with gate threshold and drain-source voltage. Even if this is all allowed for, the commonly-available enhancement-mode MOSFETs need a gate supply higher than the rail voltage to keep them ON in normal operation, requiring an inconvenient auxiliary supply.


Normally-ON SiC JFETs as a Solution

With wide band-gap (WBG) semiconductors now available, a little investigation shows that they have some appealing characteristics for current limiters. The simplest construction of a JFET actually is a great start, as it is normally-ON with VGS = 0V, no positive auxiliary rail is needed. A particular advantage is the flatness of the channel saturation current curve with drain-source voltage (Figure 2).


Figure 2. Comparison of SiC JFET and Si-MOSFET (IPA95R750P7) saturation currents

Figure 2. Comparison of SiC JFET and Si-MOSFET (IPA95R750P7) saturation currents


The initial slope of the curves is just the RDS(ON) of the device but you can see that above a certain VDS, the SiC JFET limits very well to a fixed current whereas the Si-MOSFET with similar ratings continues to rise, exceeding its package dissipation limits much sooner. Also, for SiC, electron mobility increases with temperature usefully reducing saturation current over time.

SiC JFETs are also better when compared to Si- or SiC-MOSFETs in their ‘linear’ regions when not saturation limited; at gate-source voltages around the threshold, the temperature coefficient of the transconductance of SiC is negative compared with positive values for the other technologies.[1] This provides a self-limiting action with less drain current available at high temperatures for a given gate-source voltage (Figure 3). The mechanism also prevents the hot-spot runaway effect that Si-MOSFETS exhibit, as mentioned before. When saturation-limited, SiC JFETs can also be paralleled, with confidence that the channel temperature coefficient will force current sharing. As with any devices operated in parallel in a linear mode, individual current monitoring and feedback to the gate drive is advised to compensate for variations in devices, particularly VGTH.


Figure 3. Transfer characteristics of SiC JFETs and a typical SiC-MOSFET

Figure 3. Transfer characteristics of SiC JFETs and a typical SiC-MOSFET


For a particular limit current, a SiC JFET can be chosen and the circuit for a bi-directional limiter for example is as simple as shown in Figure 4. If more control over the limit current is needed, a ‘ballast’ resistor can be added to provide an ‘end-stop’ to the current at the expense of some dissipation in normal operation or an active circuit used to sense current and close a control loop to the SiC JFET gate.

Even with this extra complexity, all the self-limiting advantages of SiC JFETs remain along with their inherent speed, high temperature and high voltage operation. In tests on SiC JFETs, it has been found that peak junction temperatures can exceed 625°C without failure, limited by the melting point of the aluminum metallization. The absence of gate oxide in their construction also helps reliability at high temperatures.


Figure 4. A simple bi-directional current limiter

Figure 4. A simple bi-directional current limiter.


SiC JFETs also generally compare favorably with other technologies; figures of merit such as RDSA, the channel resistance per unit chip area, are much better (Figure 5) meaning smaller devices and more die per wafer.


Figure 5. RDSA figure of merit comparison

Figure 5. RDSA figure of merit comparison


SiC JFETs in Your System

A common current limiting function might be in lightning protection or for the extreme transients seen in rail applications, for example. Here, peak dissipation could be in the kW range and the advantage of SiC is its extreme robustness and immunity to high peak temperatures. Often, an SiC JFET limiter would be followed by transient suppressor diodes and if they are also SiC technology you get the WBG benefits as well – high avalanche voltage ratings with high temperature and robustness that Si suppressors just can’t match.

Limiters are also needed for inrush current protection, typically into bulk capacitors in power supplies. Again, the accurate saturation current and low RDS of the SiC JFET make them ideal in the application.


When You Need to Break Rather than Limit

Sometimes current has to interrupted rather than be limited especially in high power systems. This might be under fault conditions or simply to re-route the current. Mechanical circuit breakers have low loss and perfect isolation but suffer from contact arcing and wear over time. They can also be quite slow to operate with the best still taking milliseconds to detect over-current and break a circuit. 

Over the years, many varieties of solid state circuit breakers have been proposed [2] with IGBTs, GTOs, and more recently, MOSFETs. Often these circuits need auxiliary power rails or internal power converters for biasing the active devices. SiC JFETs again excel and can be configured to be a true two-terminal device with all current sensing and biasing internally. A conceptual circuit is shown in Figure 6. Pioneering the technique, UnitedSiC has prototyped a version rated at 100 A – 600 V which has shown to trip within 20 µs with just 0.91 percent insertion loss in a 150 kW, six-phase inverter design.


Figure 6. Two-terminal self-biasing circuit breaker concept

Figure 6. Two-terminal self-biasing circuit breaker concept


While wide band-gap devices grab the headlines for their performance in high-speed switching, SiC JFETs also have all the attributes you need for the crucial application of current limiting and circuit breaking. 



  1. UnitedSiC JFET in Active Mode Applications (PDF)
  2. Semiconductor Devices in Solid-State/Hybrid Circuit Breakers: Current Status and Future Trends


Industry Articles are a form of content that allows industry partners to share useful news, messages, and technology with All About Circuits readers in a way editorial content is not well suited to. All Industry Articles are subject to strict editorial guidelines with the intention of offering readers useful news, technical expertise, or stories. The viewpoints and opinions expressed in Industry Articles are those of the partner and not necessarily those of All About Circuits or its writers.