This project brief describes how to build a compact dual-channel power amplifier module that delivers 38 W per channel into 4-ohm speakers using…
This project brief describes how to build a compact dual-channel power amplifier module that delivers 38 W per channel into 4-ohm speakers using STMicroelectronics' STA540 audio amplifier IC.
Build a low-noise, 32-bit delta-sigma ADC board designed around the ADS1262. This 10-channel design features integrated…
Build a low-noise, 32-bit delta-sigma ADC board designed around the ADS1262. This 10-channel design features integrated signal conditioning for RTDs, thermocouples, and strain gauges.
Announced today, the new AuraStack AI Super Agent brings AI-enabled design to PCB design and advanced packaging, offering…
Announced today, the new AuraStack AI Super Agent brings AI-enabled design to PCB design and advanced packaging, offering a full-flow agentic environment that boosts engineering productivity by 15X.
Build an ultra-low-noise preamplifier with a JFE150 JFET and OPA202 op-amp, perfect for high-impedance sensors,…
Build an ultra-low-noise preamplifier with a JFE150 JFET and OPA202 op-amp, perfect for high-impedance sensors, hydrophones, guitar pickups, microphones, and turntables.
Using a graphical approach, we show that coherent SSB demodulation leaves the input and output SNR unchanged, then…
Using a graphical approach, we show that coherent SSB demodulation leaves the input and output SNR unchanged, then compare its noise performance to DSB-SC and baseband systems.
This project brief describes how to build and use a four-channel differential line receiver module for balanced RS-422…
This project brief describes how to build and use a four-channel differential line receiver module for balanced RS-422 and RS-485 data links.
Visualizing how correlated and uncorrelated signals combine offers an intuitive look at power transformation. See how…
Visualizing how correlated and uncorrelated signals combine offers an intuitive look at power transformation. See how this difference boosts baseband power to double the output SNR.
This project brief describes how to implement a four-channel differential line driver module for reliable long-distance…
This project brief describes how to implement a four-channel differential line driver module for reliable long-distance data transmission over balanced twisted-pair lines.
Learn how to build a constant-bandwidth band-pass filter covering 20 kHz to 60 kHz, with an integrated frequency counter…
Learn how to build a constant-bandwidth band-pass filter covering 20 kHz to 60 kHz, with an integrated frequency counter for precise tuning.
Sending static PDFs and Gerbers for feedback is killing your project timelines and leading to costly PCB rework. Learn…
Sending static PDFs and Gerbers for feedback is killing your project timelines and leading to costly PCB rework. Learn how to break down engineering silos and modernize your PCB design reviews.
This project brief describes how to build a wide-range DC-DC buck converter capable of delivering a regulated 5.0 or 3.3…
This project brief describes how to build a wide-range DC-DC buck converter capable of delivering a regulated 5.0 or 3.3 V output from input voltages ranging from 7 to 60 V.
Sergiy Nesterenko, founder and CEO of Quilter, discusses his journey from SpaceX to creating an AI platform that uses…
Sergiy Nesterenko, founder and CEO of Quilter, discusses his journey from SpaceX to creating an AI platform that uses reinforcement learning and computational physics to fully automate complex PCB layouts.
In this article, we'll learn how to calculate the noise power and signal-to-noise ratio (SNR) of a double-sideband…
In this article, we'll learn how to calculate the noise power and signal-to-noise ratio (SNR) of a double-sideband suppressed-carrier communication system.
This project brief describes how to assemble an isolated half-bridge IGBT gate driver module built around the…
This project brief describes how to assemble an isolated half-bridge IGBT gate driver module built around the NCD57085DR2G. It features onboard current sensing and overcurrent protection.
In this Tech Guide, learn how the Vishay ISO-AC-VSAO Reference Design enables accurate, isolated high-voltage AC…
In this Tech Guide, learn how the Vishay ISO-AC-VSAO Reference Design enables accurate, isolated high-voltage AC measurement. Watch now to get started!
The new version of FPGA AI Suite is designed to accelerate trained AI models into FPGAs
The new version of FPGA AI Suite is designed to accelerate trained AI models into FPGAs
Learn how SoC integration impacts SMT assembly yield, from fine-pitch BGA challenges and package warpage to reflow…
Learn how SoC integration impacts SMT assembly yield, from fine-pitch BGA challenges and package warpage to reflow profiling and inspection strategies.
HDLs are formal descriptions of behavior, making them software by definition. Modernizing these outdated tools is key to…
HDLs are formal descriptions of behavior, making them software by definition. Modernizing these outdated tools is key to making FPGA development more accessible and productive for all engineers.
Modern SoC Evaluation Boards demand high-performance design, SI/PI, and system validation. Faraday offers 3 flexible…
Modern SoC Evaluation Boards demand high-performance design, SI/PI, and system validation. Faraday offers 3 flexible service levels to meet these complexities.
Learn how to prevent costly assembly delays by synchronizing ECAD and MCAD workflows through continuous 3D validation.…
Learn how to prevent costly assembly delays by synchronizing ECAD and MCAD workflows through continuous 3D validation. This also stabilizes production and eliminates mid-cycle re-spins.