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Flux, a Google Doc-style Collaboration Tool for Hardware Design, Changes the Face of Remote Engineering

Inspired by GitHub, a new browser-based hardware development tool has recently raised $12M in funding.

2 days ago by Jake Hertz

Cadence Releases First ECAD Platform Dedicated to 3D System Design

The Cadence Integrity 3D-IC platform brings together a suite of advanced floor planning and validation software to develop 3D-stacked SoC designs.

4 days ago by Adrian Gibbons

Facebook Open-sources Its Newest Hardware, the Time Appliance Project

The Time Appliance Project (TAP) is Facebook’s newest sub-microsecond network time synchronization system. Designed to enhance data centers, it is open-source, well documented, and ready to review.

October 08, 2021 by Adrian Gibbons

Siemens Unleashes mPower: A Power Integrity Toolset for EM and IR Analysis

A new software solution from Siemens is helping designers combat power integrity issues caused by electromigration and voltage drops. Let's dive into the issues the new tool called "mPower" is hoping to solve.

September 28, 2021 by Jake Hertz

Update HDL Code in Space From Earth? ST and Xilinx Team Up for Rad-hard FPGAs

The race for space has created a flood of innovations in space-rated tech. Hoping to strike gold with updatable FPGAs, Xilinx and STMicroelectronics have teamed up for a rad-hard solution.

August 26, 2021 by Jake Hertz

Episode 28 | How DARPA Stops IC Hardware Hackers in Their Tracks: Insights from Serge Leef

There are millions of unsecured devices on the market today. Whose responsibility is it to design secure silicon, anyway?

August 24, 2021 by Daniel Bogdanoff

Entering the Era of AI IC Design: Where Do EEs Fit In?

As AI automated design becomes more and more prevalent in IC design, what are the impacts on the everyday EE?

June 25, 2021 by Jake Hertz

Cadence’s Recent Acquisitions Reveal Focus on Computational Fluid Dynamics

This year alone, Cadence has acquired both Pointwise and NUMECA, two companies specializing in multi-physics simulations and specifically computational fluid dynamics. How might this focus reflect Cadence's EDA strategy?

April 18, 2021 by Jake Hertz

Why Physical Verification Is Only Getting Tougher With Advanced Nodes

In the nanometer era, IC complexity grows faster than die areas. EDA companies are stepping up with tools to streamline physical verification.

April 14, 2021 by Antonio Anzaldua Jr.

New Tool from UnitedSiC Aims to Simplify the Increasingly Confusing Transistor Landscape

A new component selection tool from UnitedSiC aims to make the design of SiC-based applications more straightforward and economical.

March 27, 2021 by Jake Hertz

How Should Data Converters Be Modeled for System Simulations?

This article launches a series exploring the question of how to model data converters for system simulations.

February 25, 2021 by Wes Brodsky

PCB Layout Techniques for Reducing Harmonic Distortion of a Differential ADC Driver

Summary

February 19, 2021 by Dr. Steve Arar

Understanding and Mitigating Motor Driver Board Parasitics through Simulation

This article explores using PSpice for TI to simulate potential causes for parasitic effects in a motor-drive design and offers design tips to mitigate the negative effects common with high-power motor-drive systems.

February 04, 2021 by Matt Hein, Texas Instruments

Modeling Hysteresis in SPICE

Modeling hysteresis in SPICE can be difficult when you're dealing with a multivalued transfer function. In this article, we'll teach you a way to "cheat" to get around this issue.

January 22, 2021 by Kevin Aylward

Reducing Second Harmonic Distortion with Symmetrical PCB Layout

Need a low-distortion ADC interface? In this article, we'll discuss how to reduce 2nd harmonic distortion by using symmetric PCB layout.

January 18, 2021 by Dr. Steve Arar

Comparing Binary, Gray, and One-Hot Encoding

This article shows a comparison of the implementations that result from using binary, Gray, and one-hot encodings to implement state machines in an FPGA. These encodings are often evaluated and applied by the synthesis and implementation tools, so it’s important to know why the software makes these decisions.

January 05, 2021 by Eduardo Corpeño

The Initial State of Finite State Machines and the Memory Debate

This article discusses the use of finite state machines (or FSMs) in design, including the initial state and the way memory configuration affects FPGA design.

January 04, 2021 by Eduardo Corpeño

Creating Finite State Machines in Verilog

This article describes the basics of finite state machines and shows a practical way of implementing them in the Verilog Hardware Description Language.

January 01, 2021 by Eduardo Corpeño

What Is Mixed-Signal IC Design?

This brief gives an overview of the steps in a typical mixed-signal IC design flow.

December 07, 2020 by Jean-Jacques DeLisle

What Is RF Integrated Circuit Design?

Learn the high-level steps behind RFIC design.

December 06, 2020 by Jean-Jacques DeLisle