Latest Logic Synthesis Articles and Videos

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Fabless FPGA/eFPGA Players Ramp up Their Innovations—a Roundup

With products built on some of the most advanced semiconductor fab processes—like TSMC’s 7 nm node—fabless FPGA/eFPGA providers are rolling out new updated open-source tools, new devices, and new IP.

February 08, 2023 by Jeff Child

Siemens Rolls Out IC Design Tool for Data-driven Verification

Seeking to leverage today’s data-rich engineering world, Siemens has released Questa Verification IQ, a software platform enabling data-driven IC verification.

February 03, 2023 by Jeff Child

JITX Aims to Provide Superpowers to Circuit Design Engineers

How do you begin by building world-record robots and end up trying to revolutionize the electronics industry? Dr. Duncan Haldane, co-founder and CEO of JITX, retraces his fascinating career path and describes their vision for a better circuit design process.

December 20, 2022 by Daniel Bogdanoff

AMD SOM Kit Propels Robotics Beyond Custom Designs

Keen to free industrial robotics from the burdens of custom design, AMD has launched a SOM-based starter kit that puts ROS 2 and predefined interface apps into play.

May 17, 2022 by Jeff Child

Hazards in Combinational Logic Circuits

This article covers undesired switching events, known as hazards, that can occur when developing combinational logic circuits.

December 30, 2021 by Dale Wilson

Combinational Logic Circuit Design and Simulation Using Gates

Gate-level implementation of logic functions is limited by the gate fan-in. This article examines logic factoring, grouping, and level increases to implement logic functions with limited input gates.

December 29, 2021 by Dale Wilson

Update HDL Code in Space From Earth? ST and Xilinx Team Up for Rad-hard FPGAs

The race for space has created a flood of innovations in space-rated tech. Hoping to strike gold with updatable FPGAs, Xilinx and STMicroelectronics have teamed up for a rad-hard solution.

August 26, 2021 by Jake Hertz

How Should Data Converters Be Modeled for System Simulations?

This article launches a series exploring the question of how to model data converters for system simulations.

February 25, 2021 by Wes Brodsky

PCB Layout Techniques for Reducing Harmonic Distortion of a Differential ADC Driver

Summary

February 19, 2021 by Dr. Steve Arar

Understanding and Mitigating Motor Driver Board Parasitics through Simulation

This article explores using PSpice for TI to simulate potential causes for parasitic effects in a motor-drive design and offers design tips to mitigate the negative effects common with high-power motor-drive systems.

February 04, 2021 by Matt Hein, Texas Instruments

Comparing Binary, Gray, and One-Hot Encoding

This article shows a comparison of the implementations that result from using binary, Gray, and one-hot encodings to implement state machines in an FPGA. These encodings are often evaluated and applied by the synthesis and implementation tools, so it’s important to know why the software makes these decisions.

January 05, 2021 by Eduardo Corpeño

The Initial State of Finite State Machines and the Memory Debate

This article discusses the use of finite state machines (or FSMs) in design, including the initial state and the way memory configuration affects FPGA design.

January 04, 2021 by Eduardo Corpeño

Creating Finite State Machines in Verilog

This article describes the basics of finite state machines and shows a practical way of implementing them in the Verilog Hardware Description Language.

January 01, 2021 by Eduardo Corpeño

What Is Digital IC Design?

Learn the high-level overview of digital integrated circuit (IC) design.

December 02, 2020 by Jean-Jacques DeLisle

Boosting Memory Performance in the Age of DDR5: An Intro to DDR Training Modes

Analysts predict that DDR5 will dominate the DRAM market in coming years. How do you calibrate DDR for peak memory performance?

November 06, 2020 by Dr. Steve Arar

7 Collaborative PCB Software Programs for Designers Working Remotely

Social distancing doesn't mean your productivity must come to a halt.

April 01, 2020 by Kayla Matthews

What Is a Hardware Description Language (HDL)?

This FEQ (or Frequent Engineering Question) covers the basics of a crucial topic: hardware description languages.

March 11, 2020 by Robert Keim

Voltage Buffer Simulation in PSpice: Boosting the Output Current Drive of Op-Amps

Learn how simulating a voltage buffer can help you implement it more effectively to boost the output current drive of an op-amp.

February 21, 2020 by Dr. Sergio Franco

How Is a Load Line Used in Circuit Design?

In this entry of our Frequent Engineering Questions (FEQ) series, learn the basics of how a load line can be used in designing circuits.

February 14, 2020 by Robert Keim

How to Increase the Accuracy of a Hidden Layer Neural Network

In this article, we’ll perform some classification experiments and gather data on the relationship between hidden-layer dimensionality and network performance.

February 04, 2020 by Robert Keim