John Koeter, former SVP of IP at Synopsys (retired), joins the podcast to discuss how pre-designed silicon blocks are accelerating chip development in the age of…
John Koeter, former SVP of IP at Synopsys (retired), joins the podcast to discuss how pre-designed silicon blocks are accelerating chip development in the age of AI and 3D ICs.
Announced today, MediaTek's new 3 nm Dimensity CX C10 Max SoC features an all-big-core Arm CPU and NPU 890 to bring…
Announced today, MediaTek's new 3 nm Dimensity CX C10 Max SoC features an all-big-core Arm CPU and NPU 890 to bring flagship AI performance to fanless Googlebooks.
Nexperia NSF0x0120 N-Channel SiC MOSFETs deliver high-voltage switching performance for demanding power conversion…
Nexperia NSF0x0120 N-Channel SiC MOSFETs deliver high-voltage switching performance for demanding power conversion applications. Watch and learn all about their features, specs, applications, and more!
The flagship system-on-chip pairs a 4th-generation All Big Core CPU and dual neural processing units to drive high-end…
The flagship system-on-chip pairs a 4th-generation All Big Core CPU and dual neural processing units to drive high-end compute and proactive mobile intelligence.
Launched today, Delos Data’s Nonstop AI portfolio intros Apollo Data Interface silicon, the Morpheus development…
Launched today, Delos Data’s Nonstop AI portfolio intros Apollo Data Interface silicon, the Morpheus development platform, and a system-level reference architecture to eliminate tail latency, maximize power efficiency, and scale agentic AI clusters.
M6 is Apple's first 2-nm chip and features a dual 16-core Neural Engine, while the M5 Ultra joins four dies to achieve…
M6 is Apple's first 2-nm chip and features a dual 16-core Neural Engine, while the M5 Ultra joins four dies to achieve 1.2 TB/s of unified memory bandwidth.
The Q-2390 and IQ-2390 share a Cortex-A78/A55 complex, an Adreno 704 GPU, and an optional RISC-V real-time core, with the…
The Q-2390 and IQ-2390 share a Cortex-A78/A55 complex, an Adreno 704 GPU, and an optional RISC-V real-time core, with the industrial part introducing the IQ2 Series.
Announced today, the company's new CSS for Mobile 2 platform, Total Design for Physical AI program, and Neoverse CSS N4…
Announced today, the company's new CSS for Mobile 2 platform, Total Design for Physical AI program, and Neoverse CSS N4 platform provide specialized architectures for agentic AI workloads across various domains.
The 2-nm processor runs Arm and z/Architecture instructions natively on the same core.
The 2-nm processor runs Arm and z/Architecture instructions natively on the same core.
RackCommander groups MaxLinear's USB UARTs, RS-485 transceivers, GPIO expanders, and power devices for rack-level management.
RackCommander groups MaxLinear's USB UARTs, RS-485 transceivers, GPIO expanders, and power devices for rack-level management.
Companies across industries are leveraging tech from NXP, MaxLinear and Nordic Semiconductor on automotive UWB,…
Companies across industries are leveraging tech from NXP, MaxLinear and Nordic Semiconductor on automotive UWB, accelerated OpenZFS storage, and low-power Bluetooth Mesh sensing.
In this edition of Business Shorts, we spotlight five announcements that show AI demand is reshaping everything from Wall…
In this edition of Business Shorts, we spotlight five announcements that show AI demand is reshaping everything from Wall Street financing to washing machines.
The new MCX A5 MCUs integrate 10BASE-T1S Ethernet, topology discovery, and post-quantum security to streamline and…
The new MCX A5 MCUs integrate 10BASE-T1S Ethernet, topology discovery, and post-quantum security to streamline and protect industrial edge networks.
The rebuilt platform puts the previously closed cloud backend under an Apache 2.0 license and runs on AWS serverless…
The rebuilt platform puts the previously closed cloud backend under an Apache 2.0 license and runs on AWS serverless services in a customer's own account.
The team employed a quantum material and chip architecture that could be key in scaling quantum computers to one million qubits.
The team employed a quantum material and chip architecture that could be key in scaling quantum computers to one million qubits.
The EFR32BG2B SoC family supports Bluetooth 6 and is the lowest power Bluetooth LE chip with channel sounding from Silicon Labs.
The EFR32BG2B SoC family supports Bluetooth 6 and is the lowest power Bluetooth LE chip with channel sounding from Silicon Labs.
This article shows you how to configure Software Standby mode and implement a periodic wake-up routine on the Renesas…
This article shows you how to configure Software Standby mode and implement a periodic wake-up routine on the Renesas FPB-RA0E1 Fast Prototyping Board, built around the Arm Cortex-M23-based RA0E1 MCU.
The compact system footprint and streamlined integration may help automakers adapt to shifting radio policies.
The compact system footprint and streamlined integration may help automakers adapt to shifting radio policies.
In this edition of Business Shorts, SK Group and Nvidia plan $500 billion in AI infrastructure, TDK and LG Innotek team…
In this edition of Business Shorts, SK Group and Nvidia plan $500 billion in AI infrastructure, TDK and LG Innotek team up on robotic sensing, and Micron locks in automotive memory supply.
The two research groups teamed up to demonstrate the first coherent operation of an eight-silicon-MOS spin-qubit array.
The two research groups teamed up to demonstrate the first coherent operation of an eight-silicon-MOS spin-qubit array.
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