The two research groups teamed up to demonstrate the first coherent operation of an eight-silicon-MOS spin-qubit array.
The two research groups teamed up to demonstrate the first coherent operation of an eight-silicon-MOS spin-qubit array.
On-device AI enhances retail by enabling real-time processing for robotics, kiosks, and more, offering low latency,…
On-device AI enhances retail by enabling real-time processing for robotics, kiosks, and more, offering low latency, improved privacy, and operational efficiency for a better customer experience.
The USC-run service that pioneered multi-project wafers in 1981 now offers a path from shared shuttle runs to full…
The USC-run service that pioneered multi-project wafers in 1981 now offers a path from shared shuttle runs to full production on GlobalFoundries' FinFET and FD-SOI processes.
Embedded industry pioneer Christian Eder, co-founder of congatec, joins Daniel Bogdanoff to discuss 30 years of modular…
Embedded industry pioneer Christian Eder, co-founder of congatec, joins Daniel Bogdanoff to discuss 30 years of modular design, open standards like COM-HPC, and the future of edge AI.
The Titanium Edge FPGA family targets constrained edge AI with 50% lower power, compact SiP packages, high-speed MIPI…
The Titanium Edge FPGA family targets constrained edge AI with 50% lower power, compact SiP packages, high-speed MIPI I/O, and robust security/reliability features for intelligent systems.
NXP Semiconductors i.MX 95 Application Processors deliver intelligent, secure, and real-time edge computing for…
NXP Semiconductors i.MX 95 Application Processors deliver intelligent, secure, and real-time edge computing for next-generation embedded systems. Watch and learn all about their features, specs, applications, and more!
IBM leveraged its nanostack architecture, a technique that "builds a chip like a city," to pack nearly 100 billion…
IBM leveraged its nanostack architecture, a technique that "builds a chip like a city," to pack nearly 100 billion transistors on a fingernail-sized chip.
Four deals target edge AI hardware and software, data center cooling, and embedded development tools.
Four deals target edge AI hardware and software, data center cooling, and embedded development tools.
The OECD is analyzing the semiconductor industry, focusing on supply chain resilience, global value chain mapping, and…
The OECD is analyzing the semiconductor industry, focusing on supply chain resilience, global value chain mapping, and the impact of rising industrial subsidies on global market competition.
This project brief describes how to build and use a four-channel differential line receiver module for balanced RS-422…
This project brief describes how to build and use a four-channel differential line receiver module for balanced RS-422 and RS-485 data links.
Learn how AI-powered compliance replaces manual, fragmented regulatory workflows with structured, automated data,…
Learn how AI-powered compliance replaces manual, fragmented regulatory workflows with structured, automated data, dramatically lowering the cost of EU market entry for SMEs and manufacturers.
This project brief describes how to implement a four-channel differential line driver module for reliable long-distance…
This project brief describes how to implement a four-channel differential line driver module for reliable long-distance data transmission over balanced twisted-pair lines.
OpenAI and Broadcom unveiled Jalapeño, OpenAI’s first custom AI accelerator designed from scratch for LLM inference,…
OpenAI and Broadcom unveiled Jalapeño, OpenAI’s first custom AI accelerator designed from scratch for LLM inference, developed from initial design to tape-out in 9 months.
Announced today, the new AMD Versal Premium Gen 2 MoP SoCs boost performance by integrating memory on-package. It cuts…
Announced today, the new AMD Versal Premium Gen 2 MoP SoCs boost performance by integrating memory on-package. It cuts board space by 60% while gaining 288 GB/s bandwidth and 15-year lifecycle.
Launched today, Synopsys’ ESUN IP solution slashes AI tail latency and eliminates networking bottlenecks to enable…
Launched today, Synopsys’ ESUN IP solution slashes AI tail latency and eliminates networking bottlenecks to enable seamless, scalable performance for modern AI infrastructure.
The new system-on-chip pairs a heterogeneous AI compute engine with a low-latency multi-camera image signal processor,…
The new system-on-chip pairs a heterogeneous AI compute engine with a low-latency multi-camera image signal processor, and can ship pre-integrated with emotion3D perception software.
The Korean unicorn packages four NPU dies with 144 GB of HBM3E and bets on an open software stack to serve large language…
The Korean unicorn packages four NPU dies with 144 GB of HBM3E and bets on an open software stack to serve large language models at lower cost per token.
The next-generation XR chipset delivers up to 48 TOPS of on-device AI and 4.4K-per-eye visuals. The device will debut…
The next-generation XR chipset delivers up to 48 TOPS of on-device AI and 4.4K-per-eye visuals. The device will debut this fall in XREAL's Project Aura glasses.
Thread Group and Broadband Forum are partnering to unify IoT mesh with broadband infrastructure. Also, the new Thread…
Thread Group and Broadband Forum are partnering to unify IoT mesh with broadband infrastructure. Also, the new Thread Tools app launches to provide real-world network diagnostics for engineers.
This project brief describes how to assemble an isolated half-bridge IGBT gate driver module built around the…
This project brief describes how to assemble an isolated half-bridge IGBT gate driver module built around the NCD57085DR2G. It features onboard current sensing and overcurrent protection.
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