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Bricking Proof: Designing Safety-Critical RTL for eFuse Controllers

Bricking Proof: Designing Safety-Critical RTL for eFuse Controllers

An RTL glitch in an eFuse controller can permanently brick costly silicon. This article covers defense-in-depth FSM design, redundant watchdogs, and formal SVA verification.


Altera Intros Upgrade of FPGA AI Suite Enabling Determinism for Physical AI

Altera Intros Upgrade of FPGA AI Suite Enabling Determinism for Physical AI

The new version of FPGA AI Suite is designed to accelerate trained AI models into FPGAs


News May 13, 2026 by Duane Benson
Europe’s Chip Ambitions: Why the EU’s Semi Strategy May Fall Short

Europe’s Chip Ambitions: Why the EU’s Semi Strategy May Fall Short

An audit finds that the European Chips Act is "very unlikely" to hit the 20% global market target by 2030, citing fragmented funding, slow progress on FOAKs, and fierce international competition.


News May 12, 2026 by Gordon Feller
HDLs Are Software (and It’s Crazy We’re Still Arguing About It)

HDLs Are Software (and It’s Crazy We’re Still Arguing About It)

HDLs are formal descriptions of behavior, making them software by definition. Modernizing these outdated tools is key to making FPGA development more accessible and productive for all engineers.


EU’s European Investment Bank Meets the Unique Needs of Semiconductors

EU’s European Investment Bank Meets the Unique Needs of Semiconductors

Learn how the EU's premier lending institution is deploying billions in loans, equity, and blended finance to build a sovereign European chip ecosystem.


News Apr 07, 2026 by Gordon Feller
Build Your Own Clock With Analog Dials, Part 3

Build Your Own Clock With Analog Dials, Part 3

To complete this project, we add backlight control and temperature-sensing functionality to the clock we built in the previous installments.


Build Your Own Clock With Analog Dials, Part 2

Build Your Own Clock With Analog Dials, Part 2

We continue our design of a clock that uses analog ammeters to display time and temperature. In this installment, we examine the second of the two circuits that enable the timekeeping function.


Build Your Own Clock With Analog Dials, Part 1

Build Your Own Clock With Analog Dials, Part 1

This project turns old-school analog ammeters into a working clock that can also display the ambient temperature.


ElastixAI Emerges From Stealth With FPGA Approach to Gen AI Supercomputing

ElastixAI Emerges From Stealth With FPGA Approach to Gen AI Supercomputing

In this exclusive interview, the Seattle startup says its software-ML-hardware co-design—announced today—converts off-the-shelf FPGA servers into high-efficiency AI inference engines.


News Feb 25, 2026 by Luke James
AMD Intros Mid-Range FPGAs Targeting Intelligent, High-Performance Designs

AMD Intros Mid-Range FPGAs Targeting Intelligent, High-Performance Designs

Announced today, the new FPGAs build off of AMD’s existing ecosystem with modernized memory, I/O, and security.


News Feb 04, 2026 by Jake Hertz
Exclusive—TSMC Enlightens Us About Its Next Steps in This Q&A

Exclusive—TSMC Enlightens Us About Its Next Steps in This Q&A

In this article, Gordon posed a set of questions to TSMC about their next steps going forward.


News Jan 09, 2026 by Gordon Feller
FPGAs Need a New Future

FPGAs Need a New Future

FPGAs are limited by outdated proprietary software. Learn how embracing open-source tools is necessary to modernize FPGA development and unlock their full potential.


Basic Principles and Implementation of the Quadrature FM Demodulator

Basic Principles and Implementation of the Quadrature FM Demodulator

Learn how an analog multiplier or AND gate can function as a quadrature detector for FM demodulation.


Efinix Expands Titanium Line with High-Speed, AI-Focused FPGAs

Efinix Expands Titanium Line with High-Speed, AI-Focused FPGAs

Efinix has doubled its Titanium FPGA family, adding devices with transceivers up to 25.8 Gbps to support AI, edge, and industrial applications.


News Oct 06, 2025 by Austin Futrell
At Its Innovators Day Event, Altera Unveils Expanded Agilex FPGA Portfolio

At Its Innovators Day Event, Altera Unveils Expanded Agilex FPGA Portfolio

Today, the FPGA company revealed an array of new announcements at its annual Altera Innovators Day developer conference.


News Sep 30, 2025 by Jake Hertz
Your 2025 Back-to-School Guide to All About Circuits’ Educational Resources

Your 2025 Back-to-School Guide to All About Circuits’ Educational Resources

Are you a first year electronics engineering student? Or maybe working on a second or third degree in this field? All About Circuits has the resources you need: comprehensive textbooks, technical articles, calculators, videos, and more for your EE studies.


News Sep 19, 2025 by Jeff Child
It Was Technology Innovation Galore at Embedded World 2025

It Was Technology Innovation Galore at Embedded World 2025

Enjoy this fresh crop of technology news from the Embedded World 2025 trade show in Nuremberg, Germany.


News Mar 22, 2025 by Jeff Child
Exclusive Interview—AMD Discusses Edge AI, Embedded x86, Adaptive SoCs, and More

Exclusive Interview—AMD Discusses Edge AI, Embedded x86, Adaptive SoCs, and More

In this exclusive Embedded World 2025 interview, we talk to AMD’s Kirk Saban about edge AI, ASICs vs. FPGAs, Adaptive SoCs, embedded x86, and the outlook ahead.


News Mar 21, 2025 by Jeff Child
A Preview of What’s Brewing for Embedded World 2025

A Preview of What’s Brewing for Embedded World 2025

Check out the technologies and products these leading companies plan to showcase at next week's Embedded World trade show in Nuremberg, Germany.


News Mar 08, 2025 by Jeff Child
Post-Quantum Cryptography—Securing Semiconductors in a Post-Quantum World

Post-Quantum Cryptography—Securing Semiconductors in a Post-Quantum World

Quantum computing advances are exciting, but they’re also a looming threat to securing ICs, driving the need for Post-Quantum Cryptography (PQC). Learn about PQC, how it’s being implemented, and the legislation involved.