Latest Custom Articles and Videos

An RTL glitch in an eFuse controller can permanently brick costly silicon. This article covers defense-in-depth FSM…

An RTL glitch in an eFuse controller can permanently brick costly silicon. This article covers defense-in-depth FSM design, redundant watchdogs, and formal SVA verification.

The device technology co-optimization (DTCO) methodology requires generating large numbers of layouts. This article…

The device technology co-optimization (DTCO) methodology requires generating large numbers of layouts. This article introduces a few ways of speeding up this time-consuming process using automation.

Announced today, the new ChipStack AI Super Agent from Cadence automates front end silicon design and verification,…

Announced today, the new ChipStack AI Super Agent from Cadence automates front end silicon design and verification, delivering a 10X productivity increase.

In this article, we'll walk through the steps of generating a Process Design Kit (PDK) for digital standard cell libraries.

In this article, we'll walk through the steps of generating a Process Design Kit (PDK) for digital standard cell libraries.

Learn how application-specific integrated circuits can enable companies to leverage their key IP and distinguish…

Learn how application-specific integrated circuits can enable companies to leverage their key IP and distinguish themselves from competitors who use off-the-shelf ICs.

Learn how PMIC.AI leverages custom LLM technology to transform how engineers design power supplies that meet the…

Learn how PMIC.AI leverages custom LLM technology to transform how engineers design power supplies that meet the increasing complexity of multi-rail SoC systems.

Power Integrations has upped its GaN game with InnoMux-2 IC, delivering more than 90% efficiency from a 1000 VDC bus and…

Power Integrations has upped its GaN game with InnoMux-2 IC, delivering more than 90% efficiency from a 1000 VDC bus and supplying up to 60 W from three accurately regulated outputs.

This article explores the history of the 600 nm process, the reasons behind its phase-out, and what the industry has to…

This article explores the history of the 600 nm process, the reasons behind its phase-out, and what the industry has to look forward to as smaller, more efficient chips become the new standard.

Learn how open source silicon can provide better security than traditional measures like obscurity, but only if employed…

Learn how open source silicon can provide better security than traditional measures like obscurity, but only if employed correctly, managed well, and backed with appropriate resources.

Legendary circuit simulation guru Mike Engelhardt of Qorvo discusses QSPICE, his most advanced simulator ever. He…

Legendary circuit simulation guru Mike Engelhardt of Qorvo discusses QSPICE, his most advanced simulator ever. He explains the technological advancements that enabled QSPICE and the legacy of LTspice.

This article demonstrates the operation of an LTspice shift register and discusses details of its schematic and timing…

This article demonstrates the operation of an LTspice shift register and discusses details of its schematic and timing relationships.

We explore the design and functionality of a digital shift register intended for use in mixed-signal circuit simulations.

We explore the design and functionality of a digital shift register intended for use in mixed-signal circuit simulations.

Customizing the device parameters of LTspice's logic gates and flip-flops can help you more accurately simulate these…

Customizing the device parameters of LTspice's logic gates and flip-flops can help you more accurately simulate these components. This article walks through the specification process and provides some helpful tips.

This article explains how to successfully integrate logic gates into an LTspice simulation.

This article explains how to successfully integrate logic gates into an LTspice simulation.

In this article, we use a SPICE model for 90 nm CMOS to plot key electrical relationships of an NMOS transistor.

In this article, we use a SPICE model for 90 nm CMOS to plot key electrical relationships of an NMOS transistor.

David Su, co-founder and CEO of Atmosic, is aiming to change the world…again! Today, he is helping develop low-power RF…

David Su, co-founder and CEO of Atmosic, is aiming to change the world…again! Today, he is helping develop low-power RF ICs to reduce the battery waste created by the billions of wireless and IoT devices in use.

Current briefly flows through both transistors during logic-level transitions. This article explores the resulting power…

Current briefly flows through both transistors during logic-level transitions. This article explores the resulting power dissipation and provides some helpful LTspice tips for measuring current and power.

Lightmatter aims to use light to solve two major electrical challenges in AI computing with active optical interposers…

Lightmatter aims to use light to solve two major electrical challenges in AI computing with active optical interposers designed to resolve those pesky bandwidth bottlenecks and the "world’s first" photonic computing platform for more power-efficient matrix calculations.

Learn how undervoltage lockout (UVLO) can protect semiconductor devices and electronic systems from potentially hazardous…

Learn how undervoltage lockout (UVLO) can protect semiconductor devices and electronic systems from potentially hazardous operation.