All About Circuits

Siemens Upgrades Its AI Agent to Enable Self-Verifying Agentic AI EDA Workflows

Siemens’ updated Fuse EDA AI Agent validates its own decisions against deterministic, physics-based EDA engines.


News August 03, 2026 by Jake Hertz

At DAC 2026 last week, Siemens announced an expansion of its partnership with Nvidia that brings self-verifying agentic AI workflows to semiconductor and PCB design. Autonomous agents can already plan and run multi-tool design workflows, but a language model that proposes a timing fix previously had no built-in way to prove the result is correct.

Now, Siemens’ Fuse EDA AI agent will route decisions back through deterministic, physics-based EDA engines to check each step before the flow moves on. All About Circuits went to DAC 2026 to learn about the updates firsthand.

Siemens’ booth at DAC

Siemens’ booth at DAC

 

Fuse EDA AI Agent

Typically, designers can’t let an autonomous agent handle an entire design flow because every unverified step the agent takes compounds on itself. Siemens upgraded its Fuse EDA AI Agent to resolve this problem by validating everything it produces.

As a domain-scoped planner that coordinates multi-tool workflows, the agent runs on a scalable Model Context Protocol (MCP) architecture that exposes EDA tools and physics simulators as callable services. The domain-specific agents then work through synthesis, verification, implementation, and validation as one connected flow, according to the company. By using Nvidia's NeMo Gym open library and Nvidia OpenShell secure runtime, Siemens claims it gives design teams role-based access controls, audit trails, and human-in-the-loop checkpoints.

 

Andrew Johnson, Digital Implementation Application Engineer at Siemens, demonstrating Fuse at DAC 2026.

Andrew Johnson, Digital Implementation Application Engineer at Siemens, demonstrating Fuse at DAC 2026.
 

On top of features, Siemens also added performance and efficiency to its Fuse EDA AI Agent with Nvidia Nemotron open models. Specifically, Siemens used the Nemotron 3 Ultra model to validate the agent’s design decisions because of its leading agentic RTL benchmarks with the ACE-RTL agent. By leveraging Nvidia accelerated computing and CUDA-X libraries to run AI reasoning and the EDA engines alike, Siemens claims its Fuse EDA AI Agent can produce signoff-quality results in hours instead of days.

Timeline of Siemens’ development of its Fuse EDA AI Agent.

Timeline of Siemens’ development of its Fuse EDA AI Agent. Image used courtesy of Siemens. (Click on image to enlarge).

Custom IC designers may be able to notice the improvement most in library characterization. Siemens added agentic workflows to its Solido Characterization Suite that generate and verify Liberty files automatically by running Solido Characterizer alongside Solido LibSPICE, Solido Generator, and Solido Analytics.

Because generation and verification happen inside the same loop, the company says its agent cuts characterization turnaround times by more than 10X for advanced-node standard cell, memory, and custom IP libraries while reducing token costs 5X to 10X.

 

Why Design Agents Need a Deterministic Ground Truth

Large language models are trained to produce plausible output, so correctness is a byproduct and not a guarantee. In chip design, a flawed RTL block or constraint can reach silicon, where a fix costs a mask set.

EDA signoff tools work the other way around. A SPICE simulator, a parasitic extractor, and a static timing analyzer do not author a design. Rather, each analyzes one that already exists using device physics and process data, and each returns the same answer every time it runs.

​However, a deterministic tool is only as good as the data it consumes, and standard cell characterization shows why that matters. In this process, engineers measure timing, power, and noise models for every cell in a library at process, voltage, and temperature corners. Every corner needs its own SPICE run for each combination of input slew and output load.

 

YouTube video of Solido Characterization Suite Agent
 

Those measurements then go into Liberty files, and downstream timing tools treat them as fact. A bad Liberty entry is invisible, so it can easily propagate into static timing analysis, where the tool can report a design as closed even when the silicon will miss timing.

Designers can catch these errors if they check their designs continuously, which only works if a verification pass takes minutes instead of days. Thanks to the latest advances in GPU performance, this type of continuous verification is now possible.

 

Where the Self-Verifying Flows Land Next

Siemens says its newest AI features will come with future releases of its AI-native EDA portfolio, which includes Solido for custom IC design and Questa One for verification.

 

All images by All About Circuits, except where otherwise specified.