The rapid deployment of AI workloads in data centers is driving new requirements for power electronics, including very high power density, fast load transients,…
The rapid deployment of AI workloads in data centers is driving new requirements for power electronics, including very high power density, fast load transients, and strict efficiency targets.
After building a $10B+ smartphone business, Yenchi Lee is standing up MediaTek's Datacenter BU from scratch to tackle…
After building a $10B+ smartphone business, Yenchi Lee is standing up MediaTek's Datacenter BU from scratch to tackle full-stack AI silicon, 2.5D packaging, and co-packaged optics.
As chipmakers stack dies vertically to meet surging AI demand, 2D imaging is losing its edge. Automated 3D reconstruction…
As chipmakers stack dies vertically to meet surging AI demand, 2D imaging is losing its edge. Automated 3D reconstruction is becoming essential to keeping fabs on pace.
John Koeter, former SVP of IP at Synopsys (retired), joins the podcast to discuss how pre-designed silicon blocks are…
John Koeter, former SVP of IP at Synopsys (retired), joins the podcast to discuss how pre-designed silicon blocks are accelerating chip development in the age of AI and 3D ICs.
Vishay EMIF-1S1P-481N EMI Filter Reference Design provides a flexible, ready-to-test platform for developing and…
Vishay EMIF-1S1P-481N EMI Filter Reference Design provides a flexible, ready-to-test platform for developing and optimizing single-phase, single-stage EMI filters. Watch and learn all about their features, specs, applications, and more!
Learn how rising security threats, quantum computing, and strict regulations demand FPGA architectures with integral…
Learn how rising security threats, quantum computing, and strict regulations demand FPGA architectures with integral hardware security and crypto agility for long-term compliance.
By embedding heterogeneous Si, SiC, and GaN die directly into 12-inch silicon wafers with precision RDLs, Onsemi's EPP…
By embedding heterogeneous Si, SiC, and GaN die directly into 12-inch silicon wafers with precision RDLs, Onsemi's EPP replaces wire bonds and mold compounds to deliver up to 5x power density.
The Nancy Grace Roman Space Telescope’s mirror may get the headlines, but its detector chips, photon-counting cameras,…
The Nancy Grace Roman Space Telescope’s mirror may get the headlines, but its detector chips, photon-counting cameras, and downlink amplifier tell the electronics story.
The new PolarFire FPGA-powered board from Microchip brings multiple sensors to Nvidia edge AI platforms.
The new PolarFire FPGA-powered board from Microchip brings multiple sensors to Nvidia edge AI platforms.
Skyrocketing SoC costs mean traditional testing can't catch every sub-7nm escape. Early formal verification, unified…
Skyrocketing SoC costs mean traditional testing can't catch every sub-7nm escape. Early formal verification, unified workflows, and strict gated signoffs are key to avoiding costly respins.
The ATS296X series from Actions Technology combines Ceva's High Data Throughput radio IP with Actions' own dual-RF…
The ATS296X series from Actions Technology combines Ceva's High Data Throughput radio IP with Actions' own dual-RF design, targeting links of roughly 7.5 Mbps.
Siemens’ updated Fuse EDA AI Agent validates its own decisions against deterministic, physics-based EDA engines.
Siemens’ updated Fuse EDA AI Agent validates its own decisions against deterministic, physics-based EDA engines.
The USC-run service that pioneered multi-project wafers in 1981 now offers a path from shared shuttle runs to full…
The USC-run service that pioneered multi-project wafers in 1981 now offers a path from shared shuttle runs to full production on GlobalFoundries' FinFET and FD-SOI processes.
The Titanium Edge FPGA family targets constrained edge AI with 50% lower power, compact SiP packages, high-speed MIPI…
The Titanium Edge FPGA family targets constrained edge AI with 50% lower power, compact SiP packages, high-speed MIPI I/O, and robust security/reliability features for intelligent systems.
IBM leveraged its nanostack architecture, a technique that "builds a chip like a city," to pack nearly 100 billion…
IBM leveraged its nanostack architecture, a technique that "builds a chip like a city," to pack nearly 100 billion transistors on a fingernail-sized chip.
The OECD is analyzing the semiconductor industry, focusing on supply chain resilience, global value chain mapping, and…
The OECD is analyzing the semiconductor industry, focusing on supply chain resilience, global value chain mapping, and the impact of rising industrial subsidies on global market competition.
The full-stack platform pairs the IGX Thor compute module with a safety-certified software stack and an accredited…
The full-stack platform pairs the IGX Thor compute module with a safety-certified software stack and an accredited inspection lab, with humanoid maker Agility as the first adopter.
France’s Électronique 2030 program commits €5B+ to revitalize its semiconductor industry. Learn the details of this…
France’s Électronique 2030 program commits €5B+ to revitalize its semiconductor industry. Learn the details of this ambitious effort, and the market challenges it’s facing.
At Computex, Intel described the CPU as the control plane for agentic workloads, pairing new processors and network…
At Computex, Intel described the CPU as the control plane for agentic workloads, pairing new processors and network controllers with fresh details on its inference GPU.
New characterization software delivers 7x throughput gains by combining a predictive AI engine with a purpose-built SPICE…
New characterization software delivers 7x throughput gains by combining a predictive AI engine with a purpose-built SPICE simulator.
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