5G, AI, and quantum computing are pushing RF interconnects to their limits. Learn how engineers are evolving connector designs to ensure signal integrity in…
5G, AI, and quantum computing are pushing RF interconnects to their limits. Learn how engineers are evolving connector designs to ensure signal integrity in compact, high-speed systems.
Announced today, the new AuraStack AI Super Agent brings AI-enabled design to PCB design and advanced packaging, offering…
Announced today, the new AuraStack AI Super Agent brings AI-enabled design to PCB design and advanced packaging, offering a full-flow agentic environment that boosts engineering productivity by 15X.
The Titanium Edge FPGA family targets constrained edge AI with 50% lower power, compact SiP packages, high-speed MIPI…
The Titanium Edge FPGA family targets constrained edge AI with 50% lower power, compact SiP packages, high-speed MIPI I/O, and robust security/reliability features for intelligent systems.
Artificial intelligence data pipelines are placing new pressures on enterprise storage, and data centers must rapidly…
Artificial intelligence data pipelines are placing new pressures on enterprise storage, and data centers must rapidly adapt storage capabilities with SSDs as their backbone.
The full-stack platform pairs the IGX Thor compute module with a safety-certified software stack and an accredited…
The full-stack platform pairs the IGX Thor compute module with a safety-certified software stack and an accredited inspection lab, with humanoid maker Agility as the first adopter.
Learn how AI-powered compliance replaces manual, fragmented regulatory workflows with structured, automated data,…
Learn how AI-powered compliance replaces manual, fragmented regulatory workflows with structured, automated data, dramatically lowering the cost of EU market entry for SMEs and manufacturers.
Announced today, the new AMD Versal Premium Gen 2 MoP SoCs boost performance by integrating memory on-package. It cuts…
Announced today, the new AMD Versal Premium Gen 2 MoP SoCs boost performance by integrating memory on-package. It cuts board space by 60% while gaining 288 GB/s bandwidth and 15-year lifecycle.
Launched today, Synopsys’ ESUN IP solution slashes AI tail latency and eliminates networking bottlenecks to enable…
Launched today, Synopsys’ ESUN IP solution slashes AI tail latency and eliminates networking bottlenecks to enable seamless, scalable performance for modern AI infrastructure.
The new system-on-chip pairs a heterogeneous AI compute engine with a low-latency multi-camera image signal processor,…
The new system-on-chip pairs a heterogeneous AI compute engine with a low-latency multi-camera image signal processor, and can ship pre-integrated with emotion3D perception software.
The Korean unicorn packages four NPU dies with 144 GB of HBM3E and bets on an open software stack to serve large language…
The Korean unicorn packages four NPU dies with 144 GB of HBM3E and bets on an open software stack to serve large language models at lower cost per token.
Announced today, the all-in-one VL53L9CX combines stacked BSI SPAD technology, metasurface optics, and on-chip processing…
Announced today, the all-in-one VL53L9CX combines stacked BSI SPAD technology, metasurface optics, and on-chip processing to deliver dense spatial awareness directly to small microcontrollers.
The new XpressConnect PCIe 6.0 and CXL 3.1 Retimers reign in signal integrity challenges in AI data centers and other…
The new XpressConnect PCIe 6.0 and CXL 3.1 Retimers reign in signal integrity challenges in AI data centers and other high-bandwidth installations.
The new Elite Pairing Studio is an interactive cloud-based simulation tool designed to give power electronics engineers…
The new Elite Pairing Studio is an interactive cloud-based simulation tool designed to give power electronics engineers deep visibility into device-level switching behavior and component trade-offs.
France’s Électronique 2030 program commits €5B+ to revitalize its semiconductor industry. Learn the details of this…
France’s Électronique 2030 program commits €5B+ to revitalize its semiconductor industry. Learn the details of this ambitious effort, and the market challenges it’s facing.
At Computex, Intel described the CPU as the control plane for agentic workloads, pairing new processors and network…
At Computex, Intel described the CPU as the control plane for agentic workloads, pairing new processors and network controllers with fresh details on its inference GPU.
The 88-core Vera processor introduces Spatial Multithreading and a claimed 1.8x task-completion lead over x86 processors.
The 88-core Vera processor introduces Spatial Multithreading and a claimed 1.8x task-completion lead over x86 processors.
AI-driven data demands are outpacing traditional HDDs. System developers must migrate to high-performance, secure, and…
AI-driven data demands are outpacing traditional HDDs. System developers must migrate to high-performance, secure, and efficient NVMe SSDs to scale for AI workloads.
New characterization software delivers 7x throughput gains by combining a predictive AI engine with a purpose-built SPICE…
New characterization software delivers 7x throughput gains by combining a predictive AI engine with a purpose-built SPICE simulator.
At Computex 2026, the company is expanding its Edge AI ecosystem by introducing the Snapdragon C Platform for entry-level…
At Computex 2026, the company is expanding its Edge AI ecosystem by introducing the Snapdragon C Platform for entry-level laptops, and the Dragonwing IQ10 Reference Design for robotics.
The bottleneck limiting the next generation of artificial intelligence isn't compute power—it's the wire connecting the…
The bottleneck limiting the next generation of artificial intelligence isn't compute power—it's the wire connecting the chips. French startup Scintil Photonics thinks it has the answer.
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