PCM converts an analog signal into a bit stream by sampling, quantizing, and encoding. See how a 3-bit quantizer reduces each sample to one of 8 levels.
PCM converts an analog signal into a bit stream by sampling, quantizing, and encoding. See how a 3-bit quantizer reduces each sample to one of 8 levels.
Infineon Wi-Fi 7 technology enables smart home with seamless interoperability, advanced environmental sensing, and…
Infineon Wi-Fi 7 technology enables smart home with seamless interoperability, advanced environmental sensing, and energy-efficient connectivity.
The aperture effect rolls off high message frequencies in flat-top PAM. Here’s how pulse duration limits that…
The aperture effect rolls off high message frequencies in flat-top PAM. Here’s how pulse duration limits that distortion to under 0.5% and when an equalizer helps.
Qorvo QPF5012 8.5-10.5GHz 10W Transmit Receive Module designed for 8.5 GHz to 10.5 GHz applications requiring powerful…
Qorvo QPF5012 8.5-10.5GHz 10W Transmit Receive Module designed for 8.5 GHz to 10.5 GHz applications requiring powerful transmission and sensitive signal reception. Watch and learn all about their features, specs, applications, and more!
Flat-top PAM holds each sample’s amplitude for the pulse duration, weighting the spectrum with a sinc function.…
Flat-top PAM holds each sample’s amplitude for the pulse duration, weighting the spectrum with a sinc function. Here’s how that weighting leads to the aperture effect.
Timing failures rarely announce themselves. They usually surface as system instability. Join us for a look at how…
Timing failures rarely announce themselves. They usually surface as system instability. Join us for a look at how SiTime's precision timing solutions keep that dependency silent for decades.
EMC testing is getting more complex. Discover how reverberation chambers deliver fast, repeatable, energy-efficient…
EMC testing is getting more complex. Discover how reverberation chambers deliver fast, repeatable, energy-efficient stress testing for autonomous, connected, electrified vehicles.
Announced today at OCP Summit, Cisco and Nvidia have partnered on the open USFP optical spec, alongside new Cisco Silicon…
Announced today at OCP Summit, Cisco and Nvidia have partnered on the open USFP optical spec, alongside new Cisco Silicon One ASICs and runtime security to scale next-generation Ethernet AI fabrics.
Multiplying a message by a pulse train replicates its spectrum at every harmonic. See why a 1/3 duty cycle and 4x…
Multiplying a message by a pulse train replicates its spectrum at every harmonic. See why a 1/3 duty cycle and 4x oversampling stretch the bandwidth roughly 12-fold.
The SY757xx family translates clock inputs from 1.2 to 3.3 V down to 1.2 V LVCMOS outputs at frequencies up to 250 MHz,
The SY757xx family translates clock inputs from 1.2 to 3.3 V down to 1.2 V LVCMOS outputs at frequencies up to 250 MHz,
Joaquin Torrecilla, Keysight’s VP of Software Transformation, joins the show to discuss the evolution of wireless…
Joaquin Torrecilla, Keysight’s VP of Software Transformation, joins the show to discuss the evolution of wireless tech—from early Bluetooth to LEO satellite lasers, RedCap, and AI-native 6G.
The new modular 1RU cybersecurity test platform, delivers 400 Gbps throughput for validating modern AI and hyperscale…
The new modular 1RU cybersecurity test platform, delivers 400 Gbps throughput for validating modern AI and hyperscale network infrastructure under heavy traffic demands.
The Hogge phase detector plays multiple roles in CDR circuits. In this article, we'll explore the Hogge detector's…
The Hogge phase detector plays multiple roles in CDR circuits. In this article, we'll explore the Hogge detector's behavior, highlight its main drawbacks, and introduce a different configuration that addresses them.
Learn how the Hogge detector addresses the challenges of clock and data recovery (CDR) for data signals with limited…
Learn how the Hogge detector addresses the challenges of clock and data recovery (CDR) for data signals with limited clock information.
Learn how PLLs enable communication in which a clock signal is not transmitted with the data. We’ll look specifically…
Learn how PLLs enable communication in which a clock signal is not transmitted with the data. We’ll look specifically at return-to-zero (RZ) and non-return-to-zero (NRZ) data formats.
This article explains the importance of incorporating delay into the feedback path of a phase/frequency detector (PFD)…
This article explains the importance of incorporating delay into the feedback path of a phase/frequency detector (PFD) and examines its effect on performance.
Learn how using a phase/frequency detector (PFD) in place of a phase detector improves the acquisition range of a PLL.
Learn how using a phase/frequency detector (PFD) in place of a phase detector improves the acquisition range of a PLL.
In the final part of this series, we zero in on three photonics technologies expected to be essential for demanding…
In the final part of this series, we zero in on three photonics technologies expected to be essential for demanding computing and communication systems of the future.
Amphenol Commercial PCIe® Gen 6 Mini Cool Edge IO Connectors deliver high-performance, compact interconnect solutions…
Amphenol Commercial PCIe® Gen 6 Mini Cool Edge IO Connectors deliver high-performance, compact interconnect solutions for data-intensive systems, supporting both card-edge and cable configurations. Watch and learn all about their features, specs, applications, and more!
Join your engineering community peers and take our EETech Engineering Insights Survey 2025. You’ll get a summary of the…
Join your engineering community peers and take our EETech Engineering Insights Survey 2025. You’ll get a summary of the results once they’re released. And you’ll be entered for a chance to win an Amazon card prize!
Facebook
Google
GitHub
Linkedin