Safely drive up to ±500 mA into reactive loads. This compact module employs the LT1970A and offers independent 1% source/sink thresholds and onboard fault diagnostics.
Safely drive up to ±500 mA into reactive loads. This compact module employs the LT1970A and offers independent 1% source/sink thresholds and onboard fault diagnostics.
Siemens’ updated Fuse EDA AI Agent validates its own decisions against deterministic, physics-based EDA engines.
Siemens’ updated Fuse EDA AI Agent validates its own decisions against deterministic, physics-based EDA engines.
This project brief describes how to build a compact dual-channel power amplifier module that delivers 38 W per channel…
This project brief describes how to build a compact dual-channel power amplifier module that delivers 38 W per channel into 4-ohm speakers using STMicroelectronics' STA540 audio amplifier IC.
Build a low-noise, 32-bit delta-sigma ADC board designed around the ADS1262. This 10-channel design features integrated…
Build a low-noise, 32-bit delta-sigma ADC board designed around the ADS1262. This 10-channel design features integrated signal conditioning for RTDs, thermocouples, and strain gauges.
In this Q&A with Vicor, we explore current multiplication and decoupled conversion stages. Both overcome traditional…
In this Q&A with Vicor, we explore current multiplication and decoupled conversion stages. Both overcome traditional multiphase limitations and drastically cut I²R thermal losses for high-demand loads.
Build an ultra-low-noise preamplifier with a JFE150 JFET and OPA202 op-amp, perfect for high-impedance sensors,…
Build an ultra-low-noise preamplifier with a JFE150 JFET and OPA202 op-amp, perfect for high-impedance sensors, hydrophones, guitar pickups, microphones, and turntables.
This project brief describes how to build and use a four-channel differential line receiver module for balanced RS-422…
This project brief describes how to build and use a four-channel differential line receiver module for balanced RS-422 and RS-485 data links.
This project brief describes how to implement a four-channel differential line driver module for reliable long-distance…
This project brief describes how to implement a four-channel differential line driver module for reliable long-distance data transmission over balanced twisted-pair lines.
Sending static PDFs and Gerbers for feedback is killing your project timelines and leading to costly PCB rework. Learn…
Sending static PDFs and Gerbers for feedback is killing your project timelines and leading to costly PCB rework. Learn how to break down engineering silos and modernize your PCB design reviews.
This project brief describes how to build a wide-range DC-DC buck converter capable of delivering a regulated 5.0 or 3.3…
This project brief describes how to build a wide-range DC-DC buck converter capable of delivering a regulated 5.0 or 3.3 V output from input voltages ranging from 7 to 60 V.
Sergiy Nesterenko, founder and CEO of Quilter, discusses his journey from SpaceX to creating an AI platform that uses…
Sergiy Nesterenko, founder and CEO of Quilter, discusses his journey from SpaceX to creating an AI platform that uses reinforcement learning and computational physics to fully automate complex PCB layouts.
This project brief describes how to assemble an isolated half-bridge IGBT gate driver module built around the…
This project brief describes how to assemble an isolated half-bridge IGBT gate driver module built around the NCD57085DR2G. It features onboard current sensing and overcurrent protection.
Two new CoolGaN BDS additions replace back-to-back silicon MOSFET pairs with chip-scale packages.
Two new CoolGaN BDS additions replace back-to-back silicon MOSFET pairs with chip-scale packages.
Learn how SoC integration impacts SMT assembly yield, from fine-pitch BGA challenges and package warpage to reflow…
Learn how SoC integration impacts SMT assembly yield, from fine-pitch BGA challenges and package warpage to reflow profiling and inspection strategies.
Modern SoC Evaluation Boards demand high-performance design, SI/PI, and system validation. Faraday offers 3 flexible…
Modern SoC Evaluation Boards demand high-performance design, SI/PI, and system validation. Faraday offers 3 flexible service levels to meet these complexities.
Advanced packaging is at a crossroads due to AI demand. Learn the four emerging paths—CoWoS, CoPoS, glass-core, and…
Advanced packaging is at a crossroads due to AI demand. Learn the four emerging paths—CoWoS, CoPoS, glass-core, and CoWoP—and how to choose the right one for your multi-die system design.
The Renesas 365 Development platform unifies electronics design from MCU recommendation to validation.
The Renesas 365 Development platform unifies electronics design from MCU recommendation to validation.
The shift to 3D ICs and chiplets demands automated, hierarchical design planning to manage exploding pin counts. Learn…
The shift to 3D ICs and chiplets demands automated, hierarchical design planning to manage exploding pin counts. Learn how Siemens EDA's Innovator3D IC addresses these challenges.
Announced today, the free cloud-based toolset replaces spreadsheets with graphical signal path design for automated test…
Announced today, the free cloud-based toolset replaces spreadsheets with graphical signal path design for automated test engineers.
The device technology co-optimization (DTCO) methodology requires generating large numbers of layouts. This article…
The device technology co-optimization (DTCO) methodology requires generating large numbers of layouts. This article introduces a few ways of speeding up this time-consuming process using automation.
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