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RISC-V Celebrates 10 Years of Open-Source ISA

On the heels of RISC-V’s 10th birthday, let's explore the history of RISC-V from its inception to today.

August 25, 2020 by Jake Hertz

SiFive, Co-Founder of RISC-V, Unveils Major Upgrades to RISC-V-Based Processors

As the co-founders of RISC-V, SiFive's level-up on processors could have significant implications for custom SoC design.

July 25, 2020 by Vanessa Samuel

ISP in a Box: Althea Reimagines Mesh Network Systems

It all starts with firmware that runs a routing protocol, allowing routers to pay each other for bandwidth and automate network configuration.

May 22, 2020 by Kayla Matthews

COVID-19 Puts Spotlight on Open-Source RISC-V Cores, IP

Remote work during this pandemic has shed light anew on the virtues of RISC-V, which has just gotten more accessible.

May 20, 2020 by Antonio Anzaldua Jr.

Microchip Announces First RISC-V-based SoC FPGA to Use Half the Power of Other FPGAs

Microchip's new RISC-V-based PolarFire SoC family is said to provide 50% lower power than competing mid-range FPGAs.

December 10, 2019 by Lisa Boneta

How RISC-V Security Stacks Strengthen Computer Architecture

In this article, Ted Speers of Microchip reflects on how RISC-V and its security stack offer a solution for the development of computer architecture and processor security.

November 26, 2019 by Ted Speers, Microchip

Open Memory-Centric Architectures Enabled by RISC-V and OmniXtend

This article discusses technologies for memory-centric computing and introduces OmniXtend, a cache coherence protocol.

July 09, 2019 by Ted Marena, Western Digital

CHIPS Alliance Brings Powerful Players into Open Source Hardware Collaboration

Will open source hardware become as ubiquitous as open-source software, such as Linux and Android?

July 08, 2019 by Gary Elinoff

Keeping RISC-V-Based Embedded System Design Flexible with Linux and Zephyr microPlatforms

This article discusses Foundries.io's microPlatforms which support Intel, Arm, and RISC-V architectures and are designed to avoid lock-in to specific hardware implementations.

March 28, 2019 by Trina Watt, Foundries.io

Running Hard Real-Time Applications and Linux on PolarFire SoC

This article discusses the RISC-V-based SoC FPGA architecture for PolarFire SoC, which allows hard real-time applications and Linux applications to coexist.

March 26, 2019 by Tim Morin, Microchip

RISC-V Foundation Hosting Worldwide Series of Getting Started with RISC-V Events

These roadshows will showcase innovative RISC-V implementations from leading RISC innovators.

March 23, 2019 by Gary Elinoff

Introduction to the RISC-V Instruction Set CKB-VM and its Requirements

The Nervos CKB-Virtual Machine (CKB-VM) is a RISC-V instruction set based VM for executing smart contracts on Nervos CKB, written in Rust.

March 05, 2019 by Xuejie Xiao, Nervos

Building Out the RISC-V Ecosystem

What is an ecosystem and what is not? How does the term ecosystem apply to RISC-V and it's open-source architecture? Markus Levy nad Robert Oshana weigh in on RISC-V as an ecosystem, where that ecosystem is today, and discusses new developments in RISC-V.

December 20, 2018 by Markus Levy, NXP Semiconductors

SiFive Announces Open Source-Focused SoC Development Platform Based on RISC-V and NVDLA

SiFive announces an open-source SoC platform based on RISC-V and NVDLA architectures.

August 21, 2018 by Bridgette Stone

RISC-V: Opening a New Era of Innovation for Embedded Design

This article explores the benefits behind RISC-V's open-source hardware model, discussing it's longevity, portability, and reliability.

June 27, 2018 by Ted Marena, Microsemi

Engineer Spotlight: Shafy Eltoukhy, Head of SiFive’s DesignShare Program

AAC writer, Chantelle Dubois, had a chance to speak one-on-one with the head of SiFive's DesignShare program about the benefits to IP sharing, and what he believes will be important for the future of SoC design.

December 21, 2017 by Chantelle Dubois

SiFive Building RISC-V Ecosystem, One Partnership at a Time

The catalog of IPs includes security cores, Logic NVM technology, embedded analytics, and multicore debugging toolsets.

November 28, 2017 by Majeed Ahmad

SiFive Adds Flex Logix eFPGA IPs to DesignShare Initiative

SiFive, the company behind the first RISC-V based SoCs, has recently announced the addition of Flex Logix’s FPGA IP to its DesignShare initiative.

November 12, 2017 by Chantelle Dubois

RISC-V Continues to Expand, Gathers Partnerships Across the Industry

The RISC-V Foundation has continued to build on its momentum, announcing that this month the open-source ISA presence at HOT CHIPS 29.

August 30, 2017 by Chantelle Dubois

Arduino Cinque Brings Together RISC-V and the Popular Arduino Platform

Open source hardware met open source instruction set architecture this month when SiFive announced the Arduino Cinque—an Arduino development board based off the RISC-V ISA.

May 29, 2017 by Chantelle Dubois