RISC-V’s open architecture enables a shift-left approach to security in embedded systems. Learn how it smooths the way for integrating security features and…
RISC-V’s open architecture enables a shift-left approach to security in embedded systems. Learn how it smooths the way for integrating security features and more early in the development cycle.
Enjoy this fresh crop of technology news from the Embedded World 2025 trade show in Nuremberg, Germany.
Enjoy this fresh crop of technology news from the Embedded World 2025 trade show in Nuremberg, Germany.
In this exclusive Embedded World 2025 interview, we talk to AMD’s Kirk Saban about edge AI, ASICs vs. FPGAs, Adaptive…
In this exclusive Embedded World 2025 interview, we talk to AMD’s Kirk Saban about edge AI, ASICs vs. FPGAs, Adaptive SoCs, embedded x86, and the outlook ahead.
At every point in the design process, RISC-V developers can make use of the advancements presented at RISC-V Summit Europe.
At every point in the design process, RISC-V developers can make use of the advancements presented at RISC-V Summit Europe.
Check out the technologies and products these leading companies plan to showcase at next week's Embedded World trade show…
Check out the technologies and products these leading companies plan to showcase at next week's Embedded World trade show in Nuremberg, Germany.
SiFive is helping lead the RISC-V revolution in automotive, Android, and AI. Senior VP Jack Kang joins the Moore’s…
SiFive is helping lead the RISC-V revolution in automotive, Android, and AI. Senior VP Jack Kang joins the Moore’s Lobby podcast to provide his insights on the success of SiFive and the open-standard RISC-V instruction set architecture (ISA).
While the rest of the world spent 2023 playing with ChatGPT, the electronics industry put AI into everything from…
While the rest of the world spent 2023 playing with ChatGPT, the electronics industry put AI into everything from processors to edge IoT chips to EDA tools.
Reporting a “banner year” for adoption, these RISC-V developments show the versatility of the ISA.
Reporting a “banner year” for adoption, these RISC-V developments show the versatility of the ISA.
The latest RISC-V IP makes processing power customizable for a wide span of embedded applications.
The latest RISC-V IP makes processing power customizable for a wide span of embedded applications.
Emerging from stealth mode, HaiLa believes they can enable a future of IoT nodes without batteries.
Emerging from stealth mode, HaiLa believes they can enable a future of IoT nodes without batteries.
The new Root of Trust IP from Rambus offers post-quantum cryptography hardware solutions.
The new Root of Trust IP from Rambus offers post-quantum cryptography hardware solutions.
Leveraging its proprietary in-memory compute scheme and RISC-V dataflow technology, Axelera AI seeks to “democratize”…
Leveraging its proprietary in-memory compute scheme and RISC-V dataflow technology, Axelera AI seeks to “democratize” artificial intelligence (AI).
SiFive hopes to strengthen the RISC-V community with the contribution of its WorldGuard model.
SiFive hopes to strengthen the RISC-V community with the contribution of its WorldGuard model.
With its 5G base-station-on-a-chip SoC leading the way, EdgeQ has closed a $75 million round of investment funding.
With its 5G base-station-on-a-chip SoC leading the way, EdgeQ has closed a $75 million round of investment funding.
The new architecture has the secure element as the Master, while the CPU serves as the Subordinate.
The new architecture has the secure element as the Master, while the CPU serves as the Subordinate.
With their collaboration, the firms hope to enable faster and improved functional verification testing for Bluespec’s…
With their collaboration, the firms hope to enable faster and improved functional verification testing for Bluespec’s RISC-V cores.
With the new processor, the company hopes to bring a feature-rich set of functions to the RISC-V community.
With the new processor, the company hopes to bring a feature-rich set of functions to the RISC-V community.
In a bid to bring RISC-V to the high-performance, data center computing space, Ventana announced their Veyron family, a…
In a bid to bring RISC-V to the high-performance, data center computing space, Ventana announced their Veyron family, a series of processors positioned to offer the flexibility needed to drive innovation.
At the annual summit, leaders in the RISC-V community had much to say about RISC-V taking over the world.
At the annual summit, leaders in the RISC-V community had much to say about RISC-V taking over the world.
At this year’s RISC-V Summit, stakeholders rolled out solutions revolving around verification, security, and…
At this year’s RISC-V Summit, stakeholders rolled out solutions revolving around verification, security, and software-defined SoCs.