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Standardized Open-source Processor Architecture

An introductory look at RISC-V and how discrete chips and cores provide a learning experience that gives designers a head start in gaining familiarity with the architecture and tools.

In partnership with Mouser Electronics

SiFive Seeks to Fuel Next-Gen Designs with Automotive RISC-V Cores

With its new portfolio of automotive RISC-V processor cores, SiFive aims to solve challenges in the design of evolving digital cars.

September 15, 2022 by Jake Hertz

NASA Taps SiFive’s RISC-V Core for its Spaceflight Processor

NASA has selected SiFive’s X280 RISC-V device as the CPU core for its upcoming High-Performance Spaceflight Computer (HPSC) project.

September 09, 2022 by Jake Hertz

RISC-V Universe Grows with New GPUs, CPUs, and Development Kits

More companies continue to leverage RISC-V, a free open source instruction set architecture, to push innovation in GPUs and real-time CPU devices.

August 27, 2022 by Abdulwaliy Oyekunle

Amid Chip Shortages, Companies Bet on RISC-V

The RISC-V architecture continues to gather momentum as organizations make efforts to leverage the open-source ISA technology and innovate with new RISC-V solutions.

August 24, 2022 by Lianne Frith

RISC-V Shines at Embedded World With New Specs and Processors

At Embedded World 2022 today, RISC-V activity heats up as RISC-V International reveals four new spec approvals and SiFive unveils a new version of its X280 processor.

June 21, 2022 by Jeff Child

Automotive IC Solutions Roll for Enhanced Security and ADAS

Next-gen automotive system design keeps getting more challenging. To help engineers keep pace, three chip vendors are serving up solutions aimed at enhanced security, ADAS, and simplified door control.

April 30, 2022 by Antonio Anzaldua Jr.

Highlights of Intel’s 2021 Architecture Day—a Computing-centric Event

At Intel's 2021 Architecture Day, CEO Pat Gelsinger called the company's new computing technology "magic." Here are a few highlights from the event.

August 24, 2021 by Jake Hertz

Marvell’s OCTEON 10: The First DPU To Use Neoverse N2 ARMv9 Architecture

Marvell’s newest 5 nm data processing unit (DPU), the OCTEON 10, offers 3x improvement over the previous generation along with the newest ARMv9 Core.

July 07, 2021 by Adrian Gibbons

A RISC-V Future? SiFive and Andes Aim to Shake Up the Processor Industry

RISC-V, the open-source instruction set architecture, is making inroads against industry giants, with the support of the RISC-V Foundation.

June 25, 2021 by Adrian Gibbons

ARMv9: the Long-awaited High-Performance Computing Architecture

ARM Vision 2021 defines the company's roadmap for the next ten years of specialized computing with the ARMv9-A.

April 01, 2021 by Adrian Gibbons

John von Neumann: From the Manhattan Project to the Princeton Architecture

John von Neumann has revolutionized the world of computing through his work on the Manhattan Project, the von Neumann (Princeton) Architecture, and the first IAS computer.

February 27, 2021 by Kimber Wymore

A New Multimodal Architecture Said to Redefine the Way Transistors Work

Researchers at the University of Surrey have come up with a new type of transistor that offers linear behavior and huge upside.

November 02, 2020 by Jake Hertz

Ultrasound Receiver Architecture Undergoes a Seismic Shift

Ultrasound, with nearly a century of technological history, has seen its third major technological breakthrough coming out of North Carolina State.

August 20, 2020 by Adrian Gibbons

Architecture and Design Techniques of Op-Amps

In this video we will examine the internal circuitry of an operational amplifier. A thorough analysis of any professional-quality op-amp would be far too complicated for an introductory video tutorial, but if we focus on the overall architecture and a few specific design techniques, we can learn quite a bit about op-amp functionality without getting lost in the details.

August 02, 2020 by Robert Keim

SiFive, Co-Founder of RISC-V, Unveils Major Upgrades to RISC-V-Based Processors

As the co-founders of RISC-V, SiFive's level-up on processors could have significant implications for custom SoC design.

July 25, 2020 by Vanessa Samuel

The International Telecommunication Union Announces a New Architecture That Incorporates MI Mechanisms

Recently, a study into the architecture has been presented by members of the Wireless Networking and AI&ML research groups and described as a “new standard” for telecommunications networks.

May 21, 2020 by Luke James

COVID-19 Puts Spotlight on Open-Source RISC-V Cores, IP

Remote work during this pandemic has shed light anew on the virtues of RISC-V, which has just gotten more accessible.

May 20, 2020 by Antonio Anzaldua Jr.

Neural Network Architecture for a Python Implementation

This article discusses the Perceptron configuration that we will use for our experiments with neural-network training and classification, and we’ll also look at the related topic of bias nodes.

January 09, 2020 by Robert Keim

Microchip Announces First RISC-V-based SoC FPGA to Use Half the Power of Other FPGAs

Microchip's new RISC-V-based PolarFire SoC family is said to provide 50% lower power than competing mid-range FPGAs.

December 10, 2019 by Lisa Boneta