Learn how rising security threats, quantum computing, and strict regulations demand FPGA architectures with integral hardware security and crypto agility for…
Learn how rising security threats, quantum computing, and strict regulations demand FPGA architectures with integral hardware security and crypto agility for long-term compliance.
Legacy air-gapped ECAD systems struggle to support modern engineering teams. Learn how Zero Trust and GovCloud enclaves…
Legacy air-gapped ECAD systems struggle to support modern engineering teams. Learn how Zero Trust and GovCloud enclaves enable compliant collaboration on export-restricted hardware IP.
Worked examples quantify just how much the FMFB loop shrinks noise bandwidth. We also show how the PLL demodulator offers…
Worked examples quantify just how much the FMFB loop shrinks noise bandwidth. We also show how the PLL demodulator offers a simpler alternative for reducing threshold.
Scaling down RF circuit footprints requires balancing board space against critical trade-offs. Discover how loading…
Scaling down RF circuit footprints requires balancing board space against critical trade-offs. Discover how loading methods and high-dielectric substrates impact Q factor and insertion loss.
Papers from École Polytechnique, Seoul National University, and Harvard tackle optical gain, on-chip buffering, and…
Papers from École Polytechnique, Seoul National University, and Harvard tackle optical gain, on-chip buffering, and component footprint.
Joaquin Torrecilla, Keysight’s VP of Software Transformation, joins the show to discuss the evolution of wireless…
Joaquin Torrecilla, Keysight’s VP of Software Transformation, joins the show to discuss the evolution of wireless tech—from early Bluetooth to LEO satellite lasers, RedCap, and AI-native 6G.
Deriving a general signal-to-noise expression for frequency modulation with any message signal reveals a core trade-off:…
Deriving a general signal-to-noise expression for frequency modulation with any message signal reveals a core trade-off: more deviation buys better noise performance, but only by using more bandwidth.
5G, AI, and quantum computing are pushing RF interconnects to their limits. Learn how engineers are evolving connector…
5G, AI, and quantum computing are pushing RF interconnects to their limits. Learn how engineers are evolving connector designs to ensure signal integrity in compact, high-speed systems.
This project brief describes how to build and use a four-channel differential line receiver module for balanced RS-422…
This project brief describes how to build and use a four-channel differential line receiver module for balanced RS-422 and RS-485 data links.
This project brief describes how to implement a four-channel differential line driver module for reliable long-distance…
This project brief describes how to implement a four-channel differential line driver module for reliable long-distance data transmission over balanced twisted-pair lines.
In this article, we analyze how bandpass filtering affects the power spectral density (PSD) of noise and explore how…
In this article, we analyze how bandpass filtering affects the power spectral density (PSD) of noise and explore how noise can be described by in-phase and quadrature components.
In this article, we'll learn about several key applications of PLLs in communication systems, including tracking filters,…
In this article, we'll learn about several key applications of PLLs in communication systems, including tracking filters, frequency and phase modulation, and FM and AM demodulation.
The Hogge phase detector plays multiple roles in CDR circuits. In this article, we'll explore the Hogge detector's…
The Hogge phase detector plays multiple roles in CDR circuits. In this article, we'll explore the Hogge detector's behavior, highlight its main drawbacks, and introduce a different configuration that addresses them.
Learn how the Hogge detector addresses the challenges of clock and data recovery (CDR) for data signals with limited…
Learn how the Hogge detector addresses the challenges of clock and data recovery (CDR) for data signals with limited clock information.
Learn how formal verification uses math to prove the absence of runtime errors in complex embedded software for critical…
Learn how formal verification uses math to prove the absence of runtime errors in complex embedded software for critical defense/space systems, offering stronger reliability than testing.
This article explores the operation of the simplest digital phase detector: the exclusive-OR (XOR) gate.
This article explores the operation of the simplest digital phase detector: the exclusive-OR (XOR) gate.
We examine phase detectors that leverage either the nonlinear characteristics or switching capabilities of diodes to…
We examine phase detectors that leverage either the nonlinear characteristics or switching capabilities of diodes to perform multiplication.
This article explores the operation of the Gilbert-cell phase detector for both small and large signals.
This article explores the operation of the Gilbert-cell phase detector for both small and large signals.
This article explores the Gilbert cell, a widely used analog multiplier circuit.
This article explores the Gilbert cell, a widely used analog multiplier circuit.
Learn how to select the zero frequency, damping factor, and loop bandwidth for one of the most popular PLL configurations.
Learn how to select the zero frequency, damping factor, and loop bandwidth for one of the most popular PLL configurations.
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