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OpenHW Group Announces Multi-core Evaluation SoC Based on the NXP iMX Platform

The Core-V Chassis evaluation SoC will feature a CV64A 64-bit core and a CV32E 32-bit coprocessor core as well as 3D and 2D GPUs.

December 13, 2019 by Cabe Atwell

Microchip Announces First RISC-V-based SoC FPGA to Use Half the Power of Other FPGAs

Microchip's new RISC-V-based PolarFire SoC family is said to provide 50% lower power than competing mid-range FPGAs.

December 10, 2019 by Lisa Boneta

CHIPS Alliance Brings Powerful Players into Open Source Hardware Collaboration

Will open source hardware become as ubiquitous as open-source software, such as Linux and Android?

July 08, 2019 by Gary Elinoff

Running Hard Real-Time Applications and Linux on PolarFire SoC

This article discusses the RISC-V-based SoC FPGA architecture for PolarFire SoC, which allows hard real-time applications and Linux applications to coexist.

March 26, 2019 by Tim Morin, Microchip

Arm Cortex-M Processors Get a Boost towards Machine Learning, DSP in the Age of IoT Edge Computing

Can IoT devices handle edge processing for machine learning and DSP? Arm's newly-announced Helium vector extension for Cortex-M processors aims to facilitate more complex development on the edge.

February 14, 2019 by Baker Lawley

Western Digital SweRVs Towards Open Source with New RISC-V Core, ISS, and Cache Coherency

Is open source changing the way we manage data? Western Digital, a data storage device company, switched to RISC-V's open-source ISA (instruction set architecture) a year ago. This month, they announced a series of open-source, collaborative initiatives that aim to make data more open, from processor cores to memory caches.

December 18, 2018 by Kate Smith

SiFive Announces Open Source-Focused SoC Development Platform Based on RISC-V and NVDLA

SiFive announces an open-source SoC platform based on RISC-V and NVDLA architectures.

August 21, 2018 by Bridgette Stone

Utilizing Open Source Hardware in Academic Environments

In this article, the author explores and explains his team's process of choosing and utilizing the open-source hardware platform RISC-V in an academic environment.

August 08, 2018 by Frank K. Gürkaynak, ETH Zurich

Engineer Spotlight: Shafy Eltoukhy, Head of SiFive’s DesignShare Program

AAC writer, Chantelle Dubois, had a chance to speak one-on-one with the head of SiFive's DesignShare program about the benefits to IP sharing, and what he believes will be important for the future of SoC design.

December 21, 2017 by Chantelle Dubois

RISC-V: Transforming the Development of SoC Devices that Combine FPGAs and Microcontrollers

Until recently, developers integrating a FPGA fabric with a microcontroller were severely limited in their choice of IP licensing options. Using open-source tools with a RISC-V core in a FPGA is present a solution to that problem.

September 06, 2017 by Ted Marena, Microsemi

Arduino Cinque Brings Together RISC-V and the Popular Arduino Platform

Open source hardware met open source instruction set architecture this month when SiFive announced the Arduino Cinque—an Arduino development board based off the RISC-V ISA.

May 29, 2017 by Chantelle Dubois

Open Source RISC-V Architecture Makes Strides Towards Customizable SoCs

The RISC-V footprint is expanding with the commercial availability of open-source chips and related development boards from silicon startups like SiFive and OnChip.

December 07, 2016 by Majeed Ahmad