The Terasic T-Core FPGA MAX 10 Development Board is an optimal platform for developing RISC-V based gateway applications.
In partnership with Mouser Electronics
RISC-V is a straightforward list of what a CPU should do. It’s an open and frozen instruction set that can be used in many applications with a standard core or custom extensions using an FPGA.
An introductory look at RISC-V and how discrete chips and cores provide a learning experience that gives designers a head start in gaining familiarity with the architecture and tools.
With its new portfolio of automotive RISC-V processor cores, SiFive aims to solve challenges in the design of evolving digital cars.
September 15, 2022 by Jake Hertz
NASA has selected SiFive’s X280 RISC-V device as the CPU core for its upcoming High-Performance Spaceflight Computer (HPSC) project.
September 09, 2022 by Jake Hertz
Setting out to enter the high-end processing niche within RISC-V, startup LeapFive has unveiled a quad-core 1.8 GHz RISC-V SoC.
August 30, 2022 by Chantelle Dubois
More companies continue to leverage RISC-V, a free open source instruction set architecture, to push innovation in GPUs and real-time CPU devices.
August 27, 2022 by Abdulwaliy Oyekunle
The RISC-V architecture continues to gather momentum as organizations make efforts to leverage the open-source ISA technology and innovate with new RISC-V solutions.
August 24, 2022 by Lianne Frith
At Embedded World 2022 today, RISC-V activity heats up as RISC-V International reveals four new spec approvals and SiFive unveils a new version of its X280 processor.
June 21, 2022 by Jeff Child
This article is a primer into the basics of RISC-V. The open architecture philosophy is exposed, along with a technical description of the modular ISA, and some commercial RISC-V microprocessor implementations.
June 12, 2022 by Eduardo Corpeño
Microchip continues the push for RISC-V hardware by reaching milestones with its PolarFire system-on-a-chip (SoC) field-programmable gate array (FPGA) and Mi-V ecosystem.
June 10, 2022 by Jake Hertz
A major player has joined the effort to build out the world’s largest and most successful open-source ISA.
February 09, 2022 by Jake Hertz
If 2021's RISC-V Summit told us anything, it's that the open-source hardware movement isn't slowing down anytime soon.
December 10, 2021 by Tyler Charboneau
MIPS is tapping Imperas to simplify the process of testing and verifying RISC-V processors. What goes into verification when it comes to RISC-V?
December 05, 2021 by Antonio Anzaldua Jr.
RISC-V is often associated with embedded projects. Now, the open-source ISA may be a more common player in higher-end computing markets.
September 07, 2021 by Jake Hertz
As the need for AI and data center processing keeps rising, a new AI accelerator has risen to the challenge. After years of development, Esperanto has announced its ET-SoC-1 ML inference chip.
August 26, 2021 by Jake Hertz
RISC-V, the open-source instruction set architecture, is making inroads against industry giants, with the support of the RISC-V Foundation.
June 25, 2021 by Adrian Gibbons
On the heels of RISC-V’s 10th birthday, let's explore the history of RISC-V from its inception to today.
August 25, 2020 by Jake Hertz
As the co-founders of RISC-V, SiFive's level-up on processors could have significant implications for custom SoC design.
July 25, 2020 by Vanessa Samuel
Remote work during this pandemic has shed light anew on the virtues of RISC-V, which has just gotten more accessible.
May 20, 2020 by Antonio Anzaldua Jr.
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