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TI Adds Agentic AI to CCStudio and Launches a Multiprotocol Industrial Ethernet Module

TI Adds Agentic AI to CCStudio and Launches a Multiprotocol Industrial Ethernet Module

TI is giving AI coding agents direct access to its device data and debugger, and says a new porting skill cuts migration work from months to days. A firmware-selectable communications module and an IO-Link master arrive alongside it.


News 17 hours ago by Dale Wilson
Altera Unveils a New Agilex FPGA Portfolio and Agentic AI Developer Tool

Altera Unveils a New Agilex FPGA Portfolio and Agentic AI Developer Tool

Announced today, Altera has a new FPGA portfolio along with an AI expert companion designed to accelerate development for next-generation digital and physical AI fabrics.


News Oct 28, 2026 by Jeff Child
Summit 2026 Keynote - Intelligence with Consequences: Developing Physical AI for a Better World

Summit 2026 Keynote - Intelligence with Consequences: Developing Physical AI for a Better World

Renesas UX leader Ivo Marocco explores physical AI and intelligence at the edge. He details how autonomous systems and humanoid robots must be developed responsibly, safely, and efficiently.


News Oct 21, 2026 by Renesas Electronics
The Radar Revolution: How 60 GHz Enables New Applications

The Radar Revolution: How 60 GHz Enables New Applications

Infineon’s Ted Karlin joins Moore’s Lobby to discuss the transition from BiCMOS to pure CMOS 60 GHz radar, antenna-in-package integration, and the future of smart sensing.


Efinix Buckles Down on 64-bit RISC-V Performance for Embedded FPGA Designs

Efinix Buckles Down on 64-bit RISC-V Performance for Embedded FPGA Designs

Efinix expands its Sapphire RISC-V SoC family with a configurable 64-bit processor offering larger memory support, Linux capability and FPGA acceleration for embedded and edge AI designs.


News Oct 19, 2026 by Joshua Tidwell
Ambarella Debuts Standalone AI Accelerator for Physical AI Designs

Ambarella Debuts Standalone AI Accelerator for Physical AI Designs

The X7 runs on 2-5 W, connects over PCIe Gen 3 or USB 3.2, and uses the same CVflow engine already in over 50 million of the company’s AI SoCs.


News Oct 12, 2026 by Luke James
Hubble Raises $200M to Connect Standard Bluetooth Devices by Satellite

Hubble Raises $200M to Connect Standard Bluetooth Devices by Satellite

The Seattle startup has reached a $1.6 billion valuation by turning Bluetooth LE chips into globally trackable assets—all the way from space.


News Oct 07, 2026 by Luke James
Rambus Gets to the Root of SoC Security With Caliptra Support

Rambus Gets to the Root of SoC Security With Caliptra Support

Rambus' CryptoManager Root of Trust solution for Caliptra-based SoCs adds hardware security, attack protection, and lifecycle management for data center and AI chips.


News Oct 06, 2026 by Joshua Tidwell
3 Hardware Highlights From Qualcomm’s Snapdragon Summit 2026

3 Hardware Highlights From Qualcomm’s Snapdragon Summit 2026

The Snapdragon 8 Elite Extreme Gen 6 and 8 Elite Gen 6 are the first mobile SoCs to break the 5 GHz barrier, while Snapdragon Sound Elite Gen 2 targets camera-equipped AI wearables.


News Oct 06, 2026 by Luke James
Nordic Rolls Out New Multiprotocol SoC for Size- and Cost-Effective IoT

Nordic Rolls Out New Multiprotocol SoC for Size- and Cost-Effective IoT

Nordic Semiconductor's nRF54LC10A combines Bluetooth LE, Thread, Zigbee, and Matter support with low power consumption and advanced security in a compact package for IoT devices.


News Oct 02, 2026 by Joshua Tidwell
Microchip Clock Buffers Bridge SoCs & FPGAs With Higher-Voltage Sources

Microchip Clock Buffers Bridge SoCs & FPGAs With Higher-Voltage Sources

The SY757xx family translates clock inputs from 1.2 to 3.3 V down to 1.2 V LVCMOS outputs at frequencies up to 250 MHz,


News Sep 28, 2026 by Jake Hertz
Inside a Multi-$Billion IP Engine Driving IC and EDA Innovations

Inside a Multi-$Billion IP Engine Driving IC and EDA Innovations

John Koeter, former SVP of IP at Synopsys (retired), joins the podcast to discuss how pre-designed silicon blocks are accelerating chip development in the age of AI and 3D ICs.


MediaTek Intros 3 nm SoC Designed for AI-First Googlebooks

MediaTek Intros 3 nm SoC Designed for AI-First Googlebooks

Announced today, MediaTek's new 3 nm Dimensity CX C10 Max SoC features an all-big-core Arm CPU and NPU 890 to bring flagship AI performance to fanless Googlebooks.


News Sep 21, 2026 by Jeff Child
Nexperia NSF0x0120 N-Channel SiC MOSFETs | Featured Product Spotlight

Nexperia NSF0x0120 N-Channel SiC MOSFETs | Featured Product Spotlight

Nexperia NSF0x0120 N-Channel SiC MOSFETs deliver high-voltage switching performance for demanding power conversion applications. Watch and learn all about their features, specs, applications, and more!


new products Sep 20, 2026 by Mouser
MediaTek Unveils 2 nm SoC for Agentic AI Smartphones

MediaTek Unveils 2 nm SoC for Agentic AI Smartphones

The flagship system-on-chip pairs a 4th-generation All Big Core CPU and dual neural processing units to drive high-end compute and proactive mobile intelligence.


News Sep 16, 2026 by Jeff Child
Apple Targets AI Compute With New M6 and M5 Ultra Processors

Apple Targets AI Compute With New M6 and M5 Ultra Processors

M6 is Apple's first 2-nm chip and features a dual 16-core Neural Engine, while the M5 Ultra joins four dies to achieve 1.2 TB/s of unified memory bandwidth.


News Sep 11, 2026 by Jake Hertz
Rethinking the Stack: DDR-Free, Zephyr-First Design on SoC FPGAs

Rethinking the Stack: DDR-Free, Zephyr-First Design on SoC FPGAs

Cut complex, power-hungry DDR. A Zephyr-first design on PolarFire SoC FPGAs leverages on-chip scratchpad and low-power alternatives to boost efficiency and lower BoM costs.


Qualcomm Splits One IoT Quad-Core Die Across Consumer and Industrial Lines

Qualcomm Splits One IoT Quad-Core Die Across Consumer and Industrial Lines

The Q-2390 and IQ-2390 share a Cortex-A78/A55 complex, an Adreno 704 GPU, and an optional RISC-V real-time core, with the industrial part introducing the IQ2 Series.


News Sep 10, 2026 by Luke James
Arm Rolls AI-Native Compute Platforms for Edge, Physical, and Cloud Systems

Arm Rolls AI-Native Compute Platforms for Edge, Physical, and Cloud Systems

Announced today, the company's new CSS for Mobile 2 platform, Total Design for Physical AI program, and Neoverse CSS N4 platform provide specialized architectures for agentic AI workloads across various domains.


News Sep 07, 2026 by Jeff Child
AMD to Bring UCIe Chiplet Connectivity to Versal RF Adaptive SoCs

AMD to Bring UCIe Chiplet Connectivity to Versal RF Adaptive SoCs

Select Versal RF Series devices will be AMD's first adaptive SoCs with native UCIe 1.1 interfaces, allowing designers to co-package third-party chiplets.


News Sep 03, 2026 by Luke James