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Design and Performance of the Class D Output Stage for Piezo Drivers

Design and Performance of the Class D Output Stage for Piezo Drivers

In this article, we explore the operation of a Class D stage with a capacitive load and how it can be used in piezo amplifier design.


HDLs Are Software (and It’s Crazy We’re Still Arguing About It)

HDLs Are Software (and It’s Crazy We’re Still Arguing About It)

HDLs are formal descriptions of behavior, making them software by definition. Modernizing these outdated tools is key to making FPGA development more accessible and productive for all engineers.


Operation of a Linear Phase Detector for Clock and Data Recovery

Operation of a Linear Phase Detector for Clock and Data Recovery

Learn how the Hogge detector addresses the challenges of clock and data recovery (CDR) for data signals with limited clock information.


Evaluating the Class AB Output Stage for Piezo Driver Design

Evaluating the Class AB Output Stage for Piezo Driver Design

We examine the basic requirements of piezoelectric amplifiers and how Class AB operation can meet them.


Altera Agilex™ 5 FPGAs & SoCs | Digital Datasheet

Altera Agilex™ 5 FPGAs & SoCs | Digital Datasheet

Altera Agilex™ 5 FPGAs and SoCs deliver a powerful balance of high performance, low power, and compact design for modern embedded and edge computing applications. Watch and learn all about their features, specs, applications, and more!


Introduction to Clock and Data Recovery

Introduction to Clock and Data Recovery

Learn how PLLs enable communication in which a clock signal is not transmitted with the data. We’ll look specifically at return-to-zero (RZ) and non-return-to-zero (NRZ) data formats.


Decisions Ahead for the Next Generation of Advanced Packaging

Decisions Ahead for the Next Generation of Advanced Packaging

Advanced packaging is at a crossroads due to AI demand. Learn the four emerging paths—CoWoS, CoPoS, glass-core, and CoWoP—and how to choose the right one for your multi-die system design.


Preventing Runt Pulses in Phase/Frequency Detectors

Preventing Runt Pulses in Phase/Frequency Detectors

This article explains the importance of incorporating delay into the feedback path of a phase/frequency detector (PFD) and examines its effect on performance.


Introduction to Phase/Frequency Detectors

Introduction to Phase/Frequency Detectors

Learn how using a phase/frequency detector (PFD) in place of a phase detector improves the acquisition range of a PLL.


Infineon MOTIX™ TLE9189QUW | Fast Facts

Infineon MOTIX™ TLE9189QUW | Fast Facts

Build your next motor-control solution with Infineon’s MOTIX TLE9189QUW. Watch and learn all about their features, specs, applications, and more!


Introduction to the RS Flip-Flop Phase Detector

Introduction to the RS Flip-Flop Phase Detector

Learn about this simple sequential phase detector and how it compares to the XOR gate. We'll also examine some key limitations and circuit implementations.


MIT Pioneers Two-Chip Authentication to Secure Cryptographic Schemes

MIT Pioneers Two-Chip Authentication to Secure Cryptographic Schemes

MIT's CMOS technique creates paired chips with identical “fingerprints” that secure hardware authentication without storing cryptographic keys on external servers.


News Mar 19, 2026 by Joshua Tidwell
Siemens Adds Agentic AI to Questa One to Speed IC Design

Siemens Adds Agentic AI to Questa One to Speed IC Design

A new human-centered toolkit includes goal-driven autonomous agents within established verification environments.


News Mar 17, 2026 by Jake Hertz
Understanding the Exclusive-OR Phase Detector

Understanding the Exclusive-OR Phase Detector

This article explores the operation of the simplest digital phase detector: the exclusive-OR (XOR) gate.


Build Your Own Clock With Analog Dials, Part 3

Build Your Own Clock With Analog Dials, Part 3

To complete this project, we add backlight control and temperature-sensing functionality to the clock we built in the previous installments.


Diode-Based Phase Detectors: Key Principles and Example Circuits

Diode-Based Phase Detectors: Key Principles and Example Circuits

We examine phase detectors that leverage either the nonlinear characteristics or switching capabilities of diodes to perform multiplication.


Breaking Down 50 Million Pins: A Smarter Way to Design 3D IC Packages

Breaking Down 50 Million Pins: A Smarter Way to Design 3D IC Packages

The shift to 3D ICs and chiplets demands automated, hierarchical design planning to manage exploding pin counts. Learn how Siemens EDA's Innovator3D IC addresses these challenges.


Build Your Own Clock With Analog Dials, Part 2

Build Your Own Clock With Analog Dials, Part 2

We continue our design of a clock that uses analog ammeters to display time and temperature. In this installment, we examine the second of the two circuits that enable the timekeeping function.


Using Gilbert Multipliers as Phase Detectors in PLLs

Using Gilbert Multipliers as Phase Detectors in PLLs

This article explores the operation of the Gilbert-cell phase detector for both small and large signals.


ElastixAI Emerges From Stealth With FPGA Approach to Gen AI Supercomputing

ElastixAI Emerges From Stealth With FPGA Approach to Gen AI Supercomputing

In this exclusive interview, the Seattle startup says its software-ML-hardware co-design—announced today—converts off-the-shelf FPGA servers into high-efficiency AI inference engines.


News Feb 25, 2026 by Luke James