Siemens Rolls Out IC Design Tool for Data-driven Verification
Seeking to leverage today’s data-rich engineering world, Siemens has released Questa Verification IQ, a software platform enabling data-driven IC verification.
While ICs, and the devices they’re designed into, make our lives easier, the challenges of doing development and verification of ICs continue to become more severe. The sheer complexity of today’s ASICs and FPGAs is driving this trend, and that complexity will only keep growing. To address this issue, this week Siemens’ unveiled Questa Verification IQ, a software platform centered around the idea of data-driven verification.
The company is positioning the new toolset as a team-based, cloud-enabled, data-driven platform that makes use of artificial intelligence (AI) technology. Questa Verification IQ is aimed at helping IC design engineers to do verification closure faster, streamline traceability, optimize resources, and shrink overall design process times.
We live in a complex era, rich with data. IC design engineers can leverage that data to improve their IC design verification efforts. Image used courtesy of Siemens EDA
In this article, we examine today’s challenges in IC design, we discuss how Siemens new software implements data-driven verification, and we provide highlights from our interview with Darron May, product manager, verification management, debug and coverage at Siemens Digital Industries Software.
Today's IC Verification Challenges
To understand the problem, May says we need to look at the complexity challenges faced by engineers that are developing and verifying today’s new generation of ICs. To illustrate the point, May shared data comes from Wilson Research Group’s “2022 Functional Verification Study.”
According to the report, the median length of ASIC and FPGA projects is currently around about 10 to 12 months. And, interestingly, 70% of that time is actually spent in functional verification. “We're talking about seven or eight months as the median time being spent on verification,” says May.
Increasing IC complexity is shrinking the success rate of first time silicon in ASICs and bug avoidance in FPGAs. Image used courtesy of Siemens EDA and Wilson Research Group. (Click image to enlarge)
The challenges are only getting worse over time, says May. The study shows that first time silicon success for ASICs has shrunk to 24%, that’s down by 7% in just the past eight years. “That’s actually the lowest industry seen in years—this study has been going on for that amount of time now,” says May. And, if you look at the inverse of that, 76% of ASIC projects need respins—perhaps two or three repins, says May.
The time factor is also a problem. Only a third of these ASIC designs are actually finishing on schedule, according to the study. “Because of these delays, engineers are looking for ways to accelerate their processes,” says May. All this is compounded by increased mask and wafer costs and shrinking geometries that plague ASIC design. “So it really becomes important to make these processes as efficient as possible to combat all these spiraling costs,” says May.
FPGAs are often cited as an alternative to ASICs, where practical. But, in terms of these complexity issues, FPGA projects are not performing any better. Citing the study data, May says that only 16% of FPGA designs actually achieve non-trivial bug escapes into production, while over 30% of them have two or more of those bugs affecting their quality. “Meanwhile, only 30% of FPGA projects are finishing on time, according to the study,” says May. “So it's very similar to the ASIC market.”
Moving to Data-driven Verification
To help lift the IC design world out of this rut, May argues that what’s needed is to leverage the idea that data is the key to improvement. In the IC world, this means moving to data-driven verification. “Data holds the patterns and information that experts can analyze,” he says. “And now, thanks to mass storage, modern compute infrastructure, machine learning (ML), and AI, data can now be the key to data driven verification.”
May says there are three core drivers that are important in data-driven verification: analytics, collaboration, and traceability. Analytics in this context means providing engineers with traditional algorithms for verification so they can use their own expertise to study data. “That is then augmented with the power of ML to be able to learn from these huge data sets that we generate within the verification process,” says May.
Data-driven verification relies on analytics, collaboration, and traceability. Image used courtesy of Siemens EDA. (Click image to enlarge)
For the collaboration part, what’s needed to provide efficient team-based processes for engineers. “This means aiding teams to manage data that is centralized, and being able to work over multiple locations,” says May. Finally, traceability is important to enable safety compliance. This means automating the auditing of relationships between requirements, implementation, and verification.
“Data driven verification methodology is all about taking advantage of all of these,” says May.
“Data is eating the world, right? So this is what we're trying to do—to naturally take this transformation into IC hardware verification.”
An Integrated Design Verification Platform
This data-driven approach has been put into action with Siemens’ new Questa Verification IQ software platform. Created to be the company’s next-generation collaborative verification toolset, Questa automatically captures data from every Siemens’ engine running across the life of a project. Throughout the IC design and verification process, this helps engineers to manage requirements, coding, testing, and release management, according to the company. More information can be found in the Questa Verification IQ fact sheet.
“It can automate tasks, but it also combines all the results from all the engines—be that simulation, FuSa, or formal and static tools—and provides a data platform for the complete process,” says May. Importantly, Questa is integrated with Siemens’ Polarion Requirements software, an application lifecycle management (ALM) tool.
Questa Verification IQ software collects data from multiple IC design tools so that the data can be analyzed and acted upon. Image used courtesy of Siemens EDA
“My team has been working very closely with the Polarion team over the last couple of years,” says May. “This really is the type of synergy that drove the acquisition of Mentor. The parallels between what the lifecycle management tools do for software is really the same for us in the IC hardware world.”
With that in mind, Questa enables Siemens to provide engineers a complete lifecycle solution all the way down to verification. This enables process visibility as well as the automatically extracted analysis and data to be mined for Al- and ML-type applications. May says that this mix creates a tight digital thread optimized for functional safety compliance tasks. It also enables traceability from requirements down to verification results and implementation.
Questa Verification IQ can extract coverage data from the formal and simulation engines such as its Symphony platform for analog and mixed-signal simulation and Siemens’ Veloce hardware for emulation and prototyping. Questa’s ML capability takes that data, analyzes it to predict patterns and holes, and to identify root causes. It then prescribes solutions to potential issues.
Questa is implemented in a web-based application framework. This makes it easy to scale while also reducing installation costs and ensuring device and OS independence. According to the company, Quesa supports public, private and hybrid cloud configurations with native collaboration and centralized data access. Questa Verification IQ is available now.
Using Data as Weapon Against Complexity
It’s clear that we live in a data rich world these days. In the IC design world, that data takes many forms, but still the process of designing and verifying chips keeps getting harder. Perhaps tools like Siemens’ Questa software is an example of putting data to effective use, smoothing the way toward faster, smarter, and more accurate IC design verification.