DDR Memory System Design Verification and Debug

Industry Webinar

DDR Memory System Design Verification and Debug

Johannes Ganzert, Application Engineer Rohde & Schwarz

ABOUT

Johannes Ganzert is a senior applications engineer for oscilloscopes at Rohde & Schwarz in Munich, Germany. After graduation at the Technical University of Munich, he joined Rohde & Schwarz as a development engineer for digital hardware and software. Over time, Johannes Ganzert collected a vast experience in RF and digital applications, particularly high-speed digital design and serial buses. He is an active participant in several standardization consortia like OPEN Alliance and USB-IF.

Webinar Overview

Rohde & Schwarz in partnership with All About Circuits will be having a free webinar on DDR memory system design verification and debugging. Design and verification is vital for ensuring reliable operation and minimizing the risk of failures after modifications over a product’s lifetime. Register below to reserve your spot!

In this webinar, design and verification engineers will learn best practices for DDR memory system verification/debugging using a Rohde & Schwarz® RTP high-performance oscilloscope. Join Hermann Ruckerbauer, CEO of EyeKnowHow and Johannes Ganzert, senior application engineer for oscilloscopes at Rohde & Schwarz to discuss test and tool requirements including bandwidth, trigger, and probing that all help in identifying jitter, timing, and noise issues.

AI / Neural Networks

Consumer Electronics

Digital Signal Processing

Engineering Consulting

Industrial Automation

Security / Identification

Please note: By downloading a webinar, your contact information will be shared with the sponsoring company, Rohde & Schwarz GmbH & Co.KG and the Rohde & Schwarz entity or subsidiary company mentioned in the imprint of www.rohde-schwarz.com, and you may be contacted by them directly via email or phone for marketing or advertising purposes subject to their statement of privacy.