AMD Launches Ross, an Agentic AI Assistant for Embedded Design
Ross connects developers' preferred LLMs to AMD's Vivado and Vitis HLS toolchains through open-standard MCP servers.
AMD has released Ross, an agentic AI assistant built for embedded systems engineering across the company's FPGA, adaptive SoC, embedded x86, and edge AI platforms.

AMD Ross helps developers use AMD Embedded tools through natural-language interaction.
Ross uses open-standard Model Context Protocol (MCP) servers to connect developers' preferred large language models directly to AMD's design toolchains, starting with Vivado and Vitis HLS. AMD says more than 800 customers have used the assistant in early access since summer 2026.
Open Architecture Through MCP
Rather than locking users into a single AI provider or front end, Ross operates as a client-agnostic platform. The MCP server layer sits between the developer's chosen LLM and AMD's toolchain, exposing tool capabilities that AI agents can discover and invoke at runtime. Supported front ends include VS Code, Claude Code, Cursor, Devin, and OpenCode CLI, meaning engineers can maintain their existing IDE and model preferences while gaining AI-assisted design capabilities.

The process Ross uses to turn intent into action.
This architecture also supports deployment flexibility. Ross runs on laptops, workstations, on-premises GPU servers, or public cloud infrastructure. AMD places no restrictions on which LLMs developers connect, supporting both proprietary and open-weight models. For aerospace, defense, and functional-safety applications where data cannot leave the enterprise, the system operates in a fully air-gapped configuration with offline access to AMD's knowledge base of vectorized documentation, application notes, white papers, and technical answer records.
The MCP-based approach carries a pretty major consequence for adoption: Because the protocol is an open standard, engineers aren't required to abandon their existing AI tools to use Ross. The assistant extends what those tools can do by giving them access to AMD-specific design operations and institutional knowledge.
More Than 20 Skills for Repeatable Engineering Tasks
Ross ships with over 20 agent skills published as open Markdown-formatted documents in a public GitHub repository. Each skill encodes a repeatable engineering workflow validated against AMD's own methodologies. The catalog covers timing closure, RTL linting, dataflow analysis, Vitis HLS loop unrolling, pipelining, pragma insertion, and MATLAB-to-C++ translation, among others.

AMD Ross's flow when asked, "Create a microcontroller".
These skills enable multi-agent orchestration where Ross coordinates tasks spanning FPGA logic, embedded software, and system-level requirements from a single prompt. In AMD's demonstration examples, a complex 12-camera pipeline request was partitioned across CPU, GPU, NPU, and adaptive SoC components, with human approval gates at both the planning and execution stages.
AMD encourages customers and partners to create proprietary skills or contribute new ones upstream. The company has committed to monthly releases, a significant acceleration from Vivado's previous twice-yearly release cadence.
Early Results and Roadmap
AMD's published demos suggest meaningful time savings on routine engineering tasks. An image sensor demosaic pipeline that traditionally required weeks of MATLAB-to-HLS translation and RTL refinement reached throughput targets in two hours using Ross's Vitis optimization skills, while consuming approximately 35% fewer look-up tables. In another example, Ross generated a complete MicroBlaze-based microcontroller design from a single prompt, producing an 11-step execution plan and a working design for a task AMD estimates typically takes two to three hours of manual work.
Crucially, the developer retains control throughout, with Ross enforcing mandatory human review gates before both planning and execution, and developers can restrict which tool operations the AI agent can invoke. The initial release covers Vivado, Vitis HLS, and the AMD Knowledge Base. AMD plans to add Power Design Manager, ChipScope hardware debugging, and Vitis AI inference workflows in Q4 2026, with schematic and PCB review, x86 embedded tools, and ROCm integration targeted for 2027.
More broadly, the open-standard architecture and monthly release cadence position Ross as AMD's primary vehicle for integrating AI across its embedded product portfolio. Whether engineers adopt it for routine automation or more ambitious multi-domain design orchestration will depend on how effectively the agent skills translate AMD's institutional engineering expertise into repeatable, trustworthy workflows at production scale.
All images used courtesy of AMD.