Industry White Paper

Fabless Challenges of Integrating Complex Silicon into the IC Package, Even the System PCB

July 30, 2020 by Mentor, a Siemens Business


As the world continues to demand more performance, bandwidth, and capacity from smaller, lighter, and lower-power products, the increase in High-Density Advance Packaging (HDAP) usage will continue to grow.

Extremely-high pin-count devices, such as ECUs, APUs, CPUs, GPUs, MCUs, and FPGAs, have changed the way engineers plan and implement each device’s external interfaces, or I/Os. To meet overall component criteria, such as size, thickness, performance, power, and cost, design trade-offs must be made between the chip(s) and its package. Different form factors for similar end products also mandate that different board-level platforms be considered.

To resolve these challenges, many design teams are exploring cross-domain collaboration, where the focus is on the optimized integration between and across the different implementation substrates involved. Through collaboration, design teams can achieve overall designs that efficiently meet size, performance, cost, yield, and power requirements.

Traditionally, many design teams have used spreadsheets, with the resultant, and often infamous, bump-ball map. Spreadsheets and bump-ball maps, however, are not design tools; they are simply documents that show the current state of design intent. As standalone documents, they are incapable of evaluating different scenarios, accurately modeling devices, or performing rule-based design optimization. Design intent is often misinterpreted or lost, and redundancy is often introduced into the flow and across design teams.

In this white paper by Mentor, a Siemens Business, explore the key capabilities needed to build a formal, cross-substrate integration flow that enables full collaboration between the IC(s), package, and PCB and that includes multiple, target, board-level platforms for when devices/components are intended for use on different PCB form factors.

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