Industry White Paper

Getting Started With Critical Area Analysis


Manufacturing yield is a critical component of design profitability. Maximizing the number of chips that satisfy yield expectations helps design companies maximize their expected return from the market. It also helps foundries compete for business — a foundry that can consistently demonstrate high yields is more likely to attract both repeat and new customers. And it doesn’t matter which process node or what design technology you are using. From mature nodes to leading-edge processes, from system-on-chip (SoC) designs to microelectromechanical (MEM) devices to silicon photonics (SiP), obtaining or exceeding your desired yield numbers is essential for success.

Critical area analysis (CAA) can be used by both designers and foundries to directly improve the manufacturability, and ultimately the profitability, of IC designs.

In this white paper by Mentor, a Siemens Business, learn more about the concept of defect density data for critical area analysis and how it can impact yield.

Explore how to:

  • Identify design geometries susceptible to random defects during manufacturing
  • Adjust the manufacturing processes to reduce the occurrence of random defects for given geometries
  • Generate defect density data from test chips
  • Predict defect limited yield before tapeout

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