PCIe Simulation Speed-Up Using Mentor QVIP with PLDA PCIe Controller for DMA Applications
August 04, 2020 by Mentor, a Siemens Business_1.jpg)
Whitepaper Overview
PCI Express® (PCIe®) is a dominant technology for hardware applications requiring high-speed connectivity between networking, storage, FPGA, and GPGPU boards to servers and desktop systems. It is a robust technology that has evolved over the decades to keep up with advancements in throughput and speed for I/O connectivity for computing requirements.
For memory-intensive and high-performance computing, Direct Memory Access (DMA) is an indispensable application. The trend over the years has been to move the DMA controller into devices using a point-to-point bus architecture to reduce latency and increase memory access throughput. A typical DMA operation in PCIe is the transfer of data from the system memory — that the host has access to — to endpoint devices.
This whitepaper from Mentor, a Siemens Business, discusses how verification engineers can use Mentor’s Questa Verification IP (QVIP) to improve productivity during the functional verification of PCIe designs with DMA engines.
