The Veloce Strato Platform: Unique Core Components Create High Value Advantages

White Paper Overview

A significant evolution is underway in SoC verification and validation. The complexity of SoC designs has resulted in the need to perform both comprehensive verification as well as system-level validation very early in the design cycle, often before stable register-transfer level (RTL) code is available for the entire design. This same complexity has also created the need for extensive internal visibility into the design to understand subtle problems that can occur during silicon bring-up.

While the needed level of visibility can be provided with a model of the design, it requires sufficient execution speed in the modeling environment to run content that matches silicon tests to highlight issues. Hardware emulation has sufficient execution speed, full visibility capabilities and ease-of-use in model creation and model updates to span the entire range of needs throughout the life of the design development process.

The core of this whitepaper describes the three main components of the Veloce® Strato emulation platform: the chip, the operating system software and the hardware. Each main component delivers unique capabilities in and of itself, but just as importantly, these three components are intricately linked. Essentially, each component has its own strengths but is also designed to work together with the other components to enhance user benefits and deliver exceptional verification productivity.