Industry White Paper

Veloce Primo Completes a Full SoC Verification Landscape

White Paper Overview

SoC design teams are tasked with completing full system-level verification prior to creating expensive production masks. That means thoroughly vetting all hardware blocks, all interactions between those blocks and all of the purpose-built software created for the end application – all before the chip is even built. While emulators and desktop prototype boards are two well-known participants in this verification, enterprise prototypes have also gained signification relevance.

While simulation dominates in the early stages of a design, its utility is limited to circuit blocks due to performance. Once full-chip verification begins, greater speed is needed to handle the enormous number of tests required to provide full coverage. Emulation has taken on the bulk of this burden, while desktop prototype units have primarily helped software developers to prove out their application code.

This white paper discusses how SoC verification teams can achieve higher capacity than the desktop prototype and reduce the overall cost of ownership of their hardware verification resources even as it helps to accelerate the verification cycle.

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