Virtual PCIe Delivers a “Shift Left” in Software Defined Networking Emulation

White Paper Overview

Tremendous shifts in networking research and development over the last few years have resulted in a whole new class of networking devices, more widely known as Software Defined Networking (SDN) switches and routers. Developments using Reconfigurable Match Tables (RMT) [1] and other Reduced Instruction Set Computing (RISC) style architectural choices have transitioned network switch System on a Chip (SoC) designs from fixed-function topologies into highly configurable match action devices.

This white paper reviews both SW and UVM Vector Based Verification methodologies and Advanced Vector Based Verification that use SDN HW to service PCIe transactions to the DUT. Explore how VirtuaLAB PCIe and Ethernet Virtual Machines (VM) work together, how they compete for host resources and how VMs address the big device management channel requirements for HW and SW co-verification in Veloce emulation.

Learn how VMs achieve greater functional coverage using a SDN SW High Availability test case example. Advanced development considerations highlight how checkpoint save/restore, protocol analyzer, SW configuration flexibility, ease of use and advanced debug features are markedly improved and combined into a single virtualization methodology platform.