Starting his engineering education by taking classes at Caltech under Carver Mead, one of “one of the luminaries of computer VLSI design,” Sam Naffziger “really got excited about the VLSI design field” early in his career. That excitement hasn’t waned a bit as he continues to tackle important challenges in low-power circuit and system design. 

Low-power design techniques like boost and adaptive clocking were brand new in the early 2000s, and not much interest to teams focused almost solely on performance. So, Sam had to sneak some of those low-power features into early designs:

There was another engineer who had a little tiny little microcontroller for other functions to manage the I/O interfaces, and so I managed to get a backdoor path into that microcontroller and some code space so we could actually sneak in, so that the design leads didn't actually know we had this back door.

And the rest, as the saying goes, is history:

So we got this stuff in there, and it proves so valuable…that suddenly it became an essential element for all future processors.

So valuable that it is now used in everything from smartphones to desktop PCs and the latest supercomputers.

AMD technology powers the Frontier supercomputer, capable of 1018 operations per second. Image used courtesy of ORNL

Naffziger has had such a fascinating career in the integrated circuit world that you will not want to miss a minute of this Moore’s Lobby interview with our host Daniel Bogdanoff. Some of the other great topics in this episode are:

• Early developments of in-order and out-of-order computer architectures
• Why AMD pays attention to the overclocking community
• Is performance-per-watt more important than raw performance? 
• Sam’s key role in one of the most famous Caltech pranks of all time!

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Meet Sam Naffziger

Samuel Naffziger is an AMD Senior Vice President, Corporate Fellow, and Product Technology Architect. He has over 32 years of industry experience with a background in microprocessors and circuit design at Hewlett Packard, Intel, and AMD. He is an industry expert on processor design, architecture, and implementation with a focus on power-performance-area (PPA) optimization and package technology. 

Naffziger has been the lead innovator behind many of AMD’s low-power features and chiplet architecture. At AMD, Naffziger led the power optimization of CPUs and APUs (accelerated processing units), producing the Zen processor line of desktop, server, and notebook processors. 

He is responsible for many power management innovations at AMD and in the industry such as Adaptive Voltage and Frequency Scaling (AVFS) and adaptive clocking. In addition, Naffziger has led many packaging innovations at AMD including the Rome and Milan server chiplet-based designs. 

Naffziger received a BS in Electrical Engineering from the California Institute of Technology (Cal Tech) and an MS in Computer Engineering from Stanford. He holds more than 130 U.S. patents and has authored dozens of publications and presentations on processors, architecture, and power management.