RC6 Cryptography Algorithm in VHDL

RC6 Cryptography Algorithm in VHDL


Category: Crypto Core

Created: March 24, 2009

Updated: January 27, 2020

Language: VHDL

Other project properties

Development Status: Stable

Additional info: FPGA proven

WishBone compliant: No

WishBone version: n/a

License: GPL


The Cryptographic Algorithm which is most widely used throughout the world
for protecting information. Cryptography is the art of secret writing,
followed by the guarantee to authenticate data and messages and protect
the systems from valid attacks .It comprises of encryption and decryption
operations each associated with a key which is supposed to be kept secret .

We have implement RC6 Algorithm. Which is considered as a secured and
elegant choice for AES due to its simplicity, security, performance and
efficiency. RC6 supports 32 bit and 64 bit processing. An eight step
operation is used to encipher the 64 bit plain text block. The encrypted
data is then decrypted by performing the reverse operations on the same.
The hardware implementation of RC6 algorithm is done using VHDL
Hardware Description Language. For this implementation Xilinx foundation
series 9.2i software and Spartan-3s400pq208-5 kit are being used.