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Terasic Technologies DE-10 Nano Development Kit | Featured Product Spotlight

December 26, 2017 by Mouser Electronics

The Terasic Technologies DE-10 Nano Development Kit is based on the Intel® Cyclone V SoC and provides extensive connectivity and expandability to leverage the capabilities of the Cyclone V SoC.

This Featured Product Spotlight is part of a video series exploring the specifications, applications, and market context of new products.

Terasic Technologies DE-10 Nano Development Kit

The Terasic DE-10 Nano Development Kit is based on the Intel Cyclone V SoC and provides extensive connectivity and expandability to leverage the capabilities of the Cyclone V SoC.

The Cyclone V SoC combines FPGA fabric with a dual-core ARM Cortex-A9 hard processor system. This gives engineers the ability to implement a custom ARM processor without the development time and cost of a full ASIC. It also provides the performance of a hard processor at a lower cost and lower power than a full FPGA implementation, with the ability to adapt to evolving application needs.

A high bandwidth interconnect handles communication between the FPGA fabric and hard processor system, with a peak data rate of 100 Gbps. The two also share a multiport memory controller that supports DDR2, DDR3, and LPDDR2.

The hard processor system, or HPS, consists of the dual-core ARM Cortex-A9, which is an application-class processor running at up to 800 MHz. The cores are complemented by a full peripheral set, including gigabit ethernet, USB, USB on-the-go, an SD controller, a NAND controller, low-speed peripherals, and GPIO.

On the FPGA side, you have 110k LEs that give you the full benefit of FPGA performance and reconfigurability. The FPGA fabric can be used to implement time-critical functions or high-speed interfaces in hardware, and these can easily evolve with the application, adapting to changing functional requirements, updated protocols, or new interfaces. And the FPGA fabric can be configured using the onboard USB Blaster II, serial configuration flash, or the HPS.

The DE10-Nano board itself makes it easy to evaluate and develop with all of this capability. The DE10-Nano adds an HDMI transmitter, clock generator, eight channel ADC, FPGA serial configuration flash, 1 GB of DDR3, a microSD card socket, and an accelerometer. The board also has multiple headers for connecting additional hardware, including Arduino shield connectors and two 40 pin FPGA GPIO headers.

This is complemented with a number of free development tools and resources, including the Intel Quartus Prime FPGA Design software, Intel SoC Embedded Development Suite, Intel Developer Zone, ARM DS-5 Intel SoC FPGA Edition, and BSPs, examples, and project files for Linux and OpenCL.

For the full details on the Terasic DE10-Nano Development Kit, visit

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