Ceva Expands Edge AI Portfolio From Wearables to SDVs

Ceva arrived at CES 2026 with a set of announcements that collectively illustrate how edge AI architectures continue to fragment and specialize. Rather than chasing peak TOPS numbers as might be expected in years past, the company used CES to show how tightly scoped AI processing blocks now sit within low-power edge applications. 

Ceva’s Richard Kingston (left) with All About Circuits contributor Jake Hertz (right) at CES 2026.

We spoke with Richard Kingston, Ceva's VP of market intelligence, investor relations, and public relations, to hear how these announcements fit together and why the company believes this generation of edge AI looks fundamentally different from earlier accelerators.

Ceva and Sensory Collab on Always-On, Low-Power Voice AI

A persistent design challenge in consumer edge devices is that always-on voice interfaces often exceed standby power budgets once real acoustic processing begins. Ceva’s first CES announcement tackles this issue by expanding the NeuPro-Nano embedded NPU ecosystem through a partnership with Sensory. Together, the companies are bringing Sensory’s TrulyHandsfree wake-word detection onto the platform. 

NeuPro-Nano is the smallest and lowest-power implementation in Ceva’s NPU lineup and features an architecture built for fixed-function inference. As a result, NeuPro-Nano can locally execute compact neural networks with predictable latency and minimal leakage. By integrating Sensory’s keyword-spotting models directly into NeuPro-Nano’s software environment, Ceva believes it can deliver truly continuous, on-device voice activation without cloud connectivity or wasteful DSP wake cycles.

Ceva’s NeuPro-Nano demonstration at CES 2026.

The Sensory models execute entirely on-device and integrate into the NeuPro-Studio toolchain, which exposes cycle counts, memory footprint, and inference latency during compilation.

“We’re showing how easy it is to take a neural network, port it, compile it, and optimize it for our platform, and then see exactly how many cycles it takes so customers can tune it,” Kingston said. 

NXP Integrates Ceva's AI DSP for Deterministic Automotive AI

Ceva’s second announcement moves in the opposite direction on the power spectrum and lands squarely in automotive real-time control. NXP has integrated Ceva’s SensPro AI DSP into its S32Z2 and S32E2 processors for software-defined vehicle architectures.

The challenge for NXP was that these devices sit directly in safety-critical control paths, which means processing needs to be as close to real-time as possible.

“We’re using our DSP and AI accelerators to do real-time analytics on the power of the car and the different units are drawing power,” Kingston said. “They can then optimize the platform to be much more efficient, especially for electric vehicles.”

NXP’s S32Z2 block diagram. Image used courtesy of NXP Semiconductors

NXP found SensPro to be a viable solution due to its 8-way VLIW architecture, which combines scalar and vector execution with independent instruction and data memory subsystems to run tasks with bounded latency. In this context, SensPro can process and fuse radar, LiDAR, and camera data on the same engine that executes machine-learning models. 

Ultimately, it's SensPro’s proximity that matters. By executing tasks at the point of data origin, the system reduces latency and avoids unnecessary data movement between compute domains, such as handoffs to GPUs or secondary accelerators that can introduce jitter.

“It’s very much about real-time analytics running directly on the platform, rather than pushing that data somewhere else and trying to analyze it later,” Kingston said.

BOS Selects SensPro for Scalable, Chiplet-Based ADAS

Ceva’s third CES announcement extends SensPro deeper into advanced driver assistance systems. Specifically, the company announced that BOS Semiconductors licensed Ceva’s AI DSP for its Eagle-A standalone ADAS SoC.

BOS designed Eagle-A to tackle the real-time perception workloads that sit between sensor acquisition and high-level autonomy stacks.

“These systems have to combine data from different sensors and make decisions immediately,” Kingston said. “That’s where a DSP makes sense rather than pushing everything into a big accelerator.”

In Eagle’s case, SensPro handles LiDAR and radar preprocessing and early sensor fusion, without sacrificing high throughput or deterministic response. Offloading these stages with SensPro reduces latency and limits the burden on higher-power accelerators downstream.

Ceva’s Richard Kingston (left) with All About Circuits contributor Jake Hertz (center) and Ceva's PR consultant Toni Sottak (right) at CES 2026.

Eagle-A operates within a chiplet architecture that pairs with the Eagle-N AI accelerator over UCIe or PCIe. That modular approach helps OEMs scale compute capability between ADAS tiers without redesigning the base SoC. Kingston tied this flexibility to a broader trend in AI silicon.

“You’re dealing with different neural nets for different end markets and devices,” he said. “If you’re dealing with traditional accelerators, you end up redesigning hardware. With a processor-based approach, you can do it much easier in software.”

AI Inference Moves From Theory to Reality

The common thread across NeuPro-Nano, SensPro, and the Eagle-A engagement is proximity. AI inference is now situated next to sensors and control logic, where latency, power, and determinism matter more than throughput.

“When you connect something, let it sense its surroundings, and then run AI on the device so it can act on that information autonomously,” Kingston said. “That’s really the origin of what people now call Physical AI.”

That change is also a broader market transition point, from marketing hype to reality.

“Last year, we were talking about inference as an upcoming driver,” Kingston reflected. “A year later, we’ve already signed a lot of customers, and we’re starting to see the first silicon come out. That tells you this isn’t theoretical anymore.”