Microchip Addresses Power Loss, Data Loss Concerns With New SPI EERAM Memory Chips

December 04, 2019 by Cabe Atwell

The new series of SPI EERAM memory chips were designed to retain data during power loss without the aid of external batteries.

Microchip Technology has recently announced its new series of SPI (Serial Peripheral Interface) nonvolatile EERAM memory chips, which are designed to be low-cost and are able to retain data when power is disrupted.


SPI nonvolatile EERAM memory chips.

SPI nonvolatile EERAM memory chips. Image from Microchip

EERAM is a combination of EEPROM (Electrically Erasable Programmable Read-Only Memory) and SRAM on a single chip, which keeps the information from SRAM when power is lost. Because of this merger, the SPI EERAM chips do not require an external battery for energy, but rather a small capacitor.


The devices come in I2C and SPI interfaces.

The devices come in I2C and SPI interfaces. The marked capacitor is necessary on the board as a temporary power supply. Image from Microchip


The capacitor act as a temporary power supply for SRAM and EEPROM exchanges during a power loss event.


Noteworthy Features

Microchip is offering four memory chips in their SPI EERAM family, including the 48L640 (64Kb SPI), 48L256 (256Kb SPI), 48L512 (512Kb SPI), and 48LM01 (1Mb SPI). These devices are available in 8-pin SOIC, SOIJ, and DFN packages.


Block diagram of 48L256 (256Kb SPI).

Block diagram of 48L256 (256Kb SPI). Image from Microchip

The SPI EERAM series offers unlimited reads and writes, industry-standard SPI and I2C bus types, invisible-to-user data transfers on power loss, 100,000 backups (data can be transferred 100,000 times), and 100-year data retention (data is kept safe for 100 years). Microchip also strives to maintain high quality through the CMOS manufacturing process.


Protection During Power Loss

In a recent press release, Microchip explains, “EERAM is a standalone non-volatile RAM that uses the same SPI and I2C protocols as serial SRAM, enabling devices to retain SRAM content during power loss without using an external battery. All nonvolatile aspects of the part are essentially invisible to the user. When the device detects power going away, it automatically transfers the SRAM data to nonvolatile storage and moves it back to the SRAM once power returns to the part.”


Data in SRAM is safely stored in non-volatile memory

Data in SRAM is safely stored in non-volatile memory in the event of power loss. Image from Microchip

For example, manufacturing lines and stations can handle up to millions of tasks during a production run, and lost information during those runs could require overhauling systems. EERAM would allow manufacturers to continue production where they left off during a power outage.


Economical Design

Microchip states that their SPI EERAM line offers system designers up to 25% on cost savings over current serial NVRAM (Nonvolatile RAM) alternatives.

This is due (in part) to using standard CMOS (complementary metal-oxide-semiconductor) and flash processes, overusing the FRAM (Ferroelectric RAM) method, and making them a lot more affordable to produce over other competitors.

Microchip threw in their customer-driven obsolescence practice with their SPI EERAM series as well, giving customers support for as long as it’s required.

According to VP of Microchip’s memory products division Randy Drwinga, “EERAM gives system designers the reliable, cost-effective nonvolatile RAM solutions their systems require. We received a great response to our initial launch of 4 Kb and 16 Kb densities a few years ago. This new family offers our first SPI interface products and extends to one megabit, giving customers more options to meet their system design needs.”



What do you do to prevent data loss during power shortages? Share your experiences in the comments below. 

1 Comment
  • R
    RaajRaj December 09, 2019

    Thanks for sharing the information. I have one doubt, why I2C variant device having the storage only upto 64 KB, where as SPI based device having the maximum storage 1MB ? Is there any reason behind the protocol constraints ? If any one knows, please clarify.

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