Salience Labs Marries Photonics and Electronics in AI Processor
Oxford-based startup Salience Labs is rethinking multi-chip processors, combining the merits of photonics and electronics on a single chip.
Salience Labs, a spin-out of the University of Oxford and the University of Münster, recently released a photonic processor said to meet the demands of growing data rates.
On April 26, 2022, incubator Silicon Catalyst admitted Salience Labs to its program. Silicon Catalyst strives to help startups thrive in the semiconductor industry by creating an ecosystem that lowers design and fabrication costs for silicon ICs, sensors, and microelectromechanical (MEMS) devices.
Researchers at Salient Labs are currently developing photonic computing solutions. The company hopes to meet the growing need for AI hardware by rethinking and redesigning semiconductor chip architecture.
Salience Labs Spins Out of Photonics Research
Salience Labs includes a team of engineers, physicists, and programmers who launched the startup in 2021. The researchers are currently prototyping a chip that harnesses the capabilities of light (photonics) to execute operations. The team has designed this ultra-high-throughput tensor processing chip to improve processing performance and accelerate advances in AI.
Salience Labs combines photonics and electronics in its multi-chip processor solution. Image used courtesy of Salience Labs
The technology from Salience Labs is a product of several decades of research from institutions including the University of Münster, the University of Oxford, the University of Pittsburgh, the University of Exeter, École Polytechnique Fédérale (EPFL), and IBM Research, Europe. Salience Labs recently raised $11.5 million seed for its multi-chip AI processor.
Breakdown of the Light-based Processor
Salience Labs' initial prototype of a photonic processor can use tiny light rays within confined silicon chips to rapidly process data. In a recently-released publication from Salience Labs, the research team noted that the photonic processor can efficiently operate at tera-multiply-accumulate per second (TMAC/s) speeds for modern data-intensive applications.
The team also suggested that phase-change memory arrays and photonic chip-based optical frequency combs allow its photonic processor to achieve parallelized photonic in-memory computing.
Comparison of digital, analog, and photonic tensor core architectures. Image used courtesy of Feldmann et al.
This light-based processor can speed up machine learning by processing complex mathematical tasks at high speeds and throughputs. It is said to exhibit significant improvements over conventional processor chips that rely on electronic data transfer.
A Focus on Neural Networks
The research team used a hardware accelerator to develop neural networks. The study presents an industry-first application of frequency combs in the field of artificial neural networks—essential for the independent processing of optical wavelengths within the same processor chip.
Salience Labs photonics chip. Image used courtesy of Jonas Schütte and BusinessWire
With these convolution neural networks, the chip can achieve high accuracies in classifying image and audio data. Unlike digital electronics that require several sequential processing steps, photonic in-memory computing requires a single-step matrix-vector multiplication (MVM). Salience Labs says such photonic in-memory computing provides additional freedom for N-multiplexed vectors.
Salience Labs Aims to Ramp Up AI Applications
The primary objective of Salience Labs is to develop a hybrid photonic-electronic chip for AI applications. Findings from the Salience Labs' recent publication show that the solution offers high-speed data processing, low power consumption, high accuracy, and high-precision data analysis. With these features, the chip may be used to:
- Evaluate large datasets for diagnosis in clinical settings
- Improve self-driving vehicles
- Enhance IT infrastructure for cloud computing
The newly-released photonics chip from the company allows data modulation at up to 100 GHz, allowing high parallelization levels with multiplexing.